Test Card / Teletext Generator - Phase 2

[Parabola]

Hello All,

Colour!

Following on from the this thread, I thought I would publish an update for anybody interested in this ongoing struggle of aspiration over ability.

At the end of the last thread I had run into problems adding the extra PROMs required for colour / text onto the existing address and data bus. The conclusion drawn, probably wrongly given hindsight, was that with the extra L and C of an extended bus, the timing budget was being overdrawn when uing 70ns PROMs. With an 83ns clock period (12MHz) driving 70ns PROMs, there’s not a lot of spare nanosecs around for the TTL to do it’s thing and everything else run along in time and happily.

For a while I considered building a different TTL counter and trying again, but not wanting to go to that effort only to find it didn’t work, and knowing that the CPLD supporters club were telling me it would knock spots off the speed of the TTL, I finally bit the bullet and opened the box of the Xilinx CoolRunner II evaluation kit that I’d been using as a paperweight….yikes.

I’ve attached a picture of the CRII evaluation board. Basically, it’s a 256 macrocell CPLD with enough bits built onto the board to allow easier programming (via USB instead of JTAG) and make use of some switches, LEDs and seven segment displays when writing programs (firmware). The first thing I had to do was populate the 40 pin expansion connector at the bottom of the board with a 90 degree 40 pin header so that I could connect the board into my own protoype and thus utilise the chip for my own purposes.

Secondly I needed a master clock of the correct speed – the CRII board’s clock runs at 1MHz as supplied. Xilinx have thought of this though and provide an 8pin DIL socket to plug in an oscillator of your choice. So in went a suitable 12MHz package.

Then it was back to the prototype and rip-out all the TTL to replace it with a
suitable 40pin socket to plug the CRII board into. Again, pictures attached.

As this is dragging on a bit and people are snoring at the back, I’ll compress the next bit into a few bullet points,

Then it was merely a case of -

Installing the Xilinx development software.

Learning how to program and compile VHDL.

Learning how to get the program into the chip!

Writing the program logic for suitable address counting, resetting and sequential PROM selection.

Generating and programming a set of 4 colour PROMs (4 frames / 8 fields).

Throwing together an Op-Amp buffer output stage with a suitable filter.

Plugging it all in to a telly and sitting back to admire the results....Easy.

Well, that’s one version of how it happened, but you’d be in a coma by the time I’d filled in all the flesh on that lot.

If there’s anything anyone is particulary interested in then please ask and I’ll then elaborate on any individual aspect.

Of course, the CRII evaluation board can now be replaced with just a single suitable chip (Xilinx XC2C64A - see pic), some decoupling and a suitable voltage reguator. Looks like I've been dragged away from TTL for good and over to the darkside.

The prototype now has 5 PROMs - 4 to generate a pattern in colour and with optional textext (to come), and another for a monochrome pattern (of any standard - so it's a dual standard generator). These two options are selected using one of the slide switches on the CRII board.

Oh, btw, had the usual difficulties photographing and downsizing screenshots without too much introduced patterning, so please bear that in mind when viewing the pics.

So, onward to Teletext…… (which should be quite easy now)

Parabola

[Parabola]

and the rest of the pics....

[ppppenguin]

This is really excellent progress. From a heap of marginal TTL/CMOS to a fully working CPLD based design.

70ns PROMs with an 83ns cycle time will work but as the OP said, there's not a lot of time for everything else. The DAC has a minimal setup time, ISTR less than 2ns, while even the slowest Coolrunner CPLD is better than 7ns from clock to output. This leaves a few ns in hand.

[Parabola]

Thanks, Jeffrey - just proves anyone can do it if I can.

For my next trick...Teletext. Please see pics.

I've just coded one page into PROM 0 (1st PROM of the colour pattern set) as a test. The page is a coded reconstuction of an image from the excellent, and very handy, gallery here - http://teletext.mb21.co.uk/gallery/oracle/end-itv.shtml

Possibly the first time that particular page has been run through a real Teletext Decoder since 1992. I've also posted a picture of the TV's decoder set to 'Mix', just to prove it's real teletext and not just an image!

Time for a lie down.....

Parabola

[ppppenguin]

The hardware is interesting but ultimately it's just a large memory with all the data for the entire waveform. The really interesting bit is the software to create that data. Is it http://www.oodletuz.fsnet.co.uk/soft/tcmaker.htm ? Please tell us more about what you are using and how you are using it.

One interesting way to make a TC gen would be to use RAM rather than PROMs. I don't know how hard it would be to do an interface in the CPLD to an XD or similar flash card. This could hold lots of images which could be loaded into the RAM. Programming the card would be done on a PC.

[Tazman1966]

Facinating stuff. Shame I can't get my head around some of the theory

[Parabola]

Originally Posted by ppppenguin

The really interesting bit is the software to create that data. Is it http://www.oodletuz.fsnet.co.uk/soft/tcmaker.htm ?

No, so far I've still not found any useful purpose for anything on that site

Originally Posted by ppppenguin

Please tell us more about what you are using and how you are using it.

Ok, the various bits of software used in this project so far, and an outline of what for, are as follows -

RT Russell Test card Generator v3.2d - http://www.compulink.co.uk/~rrussell.../download.html

As mentioned in the previous thread, RT Russell's TCGen was one of the primary inspirations behind this project. The software has been invaluable for defining the format of the PROMs and performing Burst and subcarrier encoding for the colour pattern. Also, for Clock Run-In, Framing Code and MRAG coding of the Teletext page(s). However, some general hacking, chopping and interfering with it's created output has been required - this I'm not prepared to elaborate on here.

XVI32 Hex Editor by Christian Maas - http://www.chmaas.handshake.de/delph...vi32/xvi32.htm

This has been used to perform the aforementioned hacking and chopping to create ROM images how I want them. It has also been used to code the Teletext page manually (with the help of WinTTX, below, to view the resulting page) using the information in the 1976 document "Broadcast Teletext Specification" published jointly by The BBC, IBA and BREMA.

WinTTX v1.51 by Richard Murray - http://www.heyrick.co.uk/software/winttx/
I've used this as a handy page viewer which can display the page in an easier on the eye grid, along with control codes and the ability to view a hex dump.

Videotex by RT Russell - http://www.compulink.co.uk/~rrussell.../videotex.html
I've played with this a bit. It looks like a useful Videotex/Teletext page editor, but seems to have issues when not running on a 16bit OS, so is only included here for possible future use (if I find a 16bit machine to use it on!)

As well as the above, extensive use has been made of Adobe Photoshop and good old Windows Notepad (to hold and view chunks of code at times). Also, my PROM programmer is capable of chopping up and editing PROMs itself, without a host PC application.

I think that's about it. I'm not really going to go into the exact process I've used as I feel it would be unfair to the authors of the software to detail how to hack bits of it in various ways. As I've only done this for my own personal use up to this point (I want Teletext after 2012!), I don't believe I'm infinging any related licences.

Originally Posted by ppppenguin

One interesting way to make a TC gen would be to use RAM rather than PROMs. I don't know how hard it would be to do an interface in the CPLD to an XD or similar flash card. This could hold lots of images which could be loaded into the RAM. Programming the card would be done on a PC.

I did mention this at the bottom of This post in the preceding thread. I've spent many happy(?) hours reading the Compact Flash Specification with regard to this. A CPLD can be made to make a reasonable card interface (Xilinx have a published example), but I'm sure you'd then also need a micro to control the whole lot. The problem is that PC's want to write to cards as hard disks with a format they understand, therefore the TCGEN reader end would also need to know about the same formats. You can use flash cards as addressable memory, but then you'd need a suitable application, other than the OS, to program them on the PC. That's my understanding anyway.

Originally Posted by Tazman1966

Facinating stuff. Shame I can't get my head around some of the theory

I'm sure you can. It's just that you HAVE a life and I have far too much time on my hands

Parabola

Splendid job.

Once you 'get into' one of these advanced programmable systems (CPLD, FPGA, Microcontroller) there is no looking back, so much cheaper and quicker.

I wonder if one of these would fit on a dsPIC (my choice of advanced technology, and dead cheap).

[Parabola]

Looking at that range of chips, I'm sure there are plently of possibilities. I've only skimmed the relevant page on the Microchip site, but if there's one with 16MBit of flash (likely) and a built in DAC (not sure), you could end up with a single chip solution. Personally, I won't be going down that route though, having tied the colours to the Xilinx mast on this one. By the way, the Xilinx XC2C64A is only £2.63 in singles, less in quantity.

As far as the Phase 2 prototype goes, apart from a couple of possible small refinements around the DAC and a tidy up of the VHDL, that's about it. If a Phase 3 (downloadable version) ever appears, it will likely be all surface mount to accomodate a single large flash or SRAM memory. I say 'if', because I've achieved what I basically wanted for my own use now and so may be lazy and call it a day at that. I would like more than the 4 text pages, but that's probably best as a whole different project altogether.

Parabola

[Parabola]

Just a little additional update for anybody interested in 525 line / NTSC Colour (Color? ....nah, we're English!)

Same old boring hardware I'm afraid, but had some time today so thought I'd have a go at the US standards. Mr ppppenguin has kindly lent me a suitable monitor to display 525 and NTSC Colour on, so I had no excuses left.

So, with a bit of the usual hacking and chopping and programming of hex files, plus a quick and dirty modification of the Xilinx VHDL code, both 525 line monochrome and colour patterns have been produced (please see attached pics).

In this configuration the generator has 3 PROMs - 2 for the colour pattern (because NTSC can be properly coded in 4 fields rather than PAL's 8) and another for the monochrome option. Again the patterns are switchable as required.

I didn't have much luck trying to find a definitive US colo(u)r testcard, in the same way that we have TCF, so went with an early NBC Peacock logo as it was nice and colourful. Was there any iconic US equivalent to our TCF? If so, where can I get hold of a copy?

Parabola

[ppppenguin]

Looks pretty, but does the signal have to go all the way round that drum of co-ax to arrive at the monitor?

12MHz (along with 13.5MHz) is one of a small number of sensible sample clock frequencies that will give an integer number of pixels for both a PAL and NTSC frame. This is important for a test card generator. Unlike 13.5MHz, it will not give an integer number of pixels per line in NTSC. Neither 12MHz nor 13.5MHz will give an integer number of pixels per line on 405. This doesn't matter for this sort of design but would be highly inconvenient for any sort of image processing.

[Parabola]

Originally Posted by ppppenguin

Looks pretty, but does the signal have to go all the way round that drum of co-ax to arrive at the monitor?

Hmmm, that's a bit of an optical illusion, as the BNC cable has nothing to do with the expensive reel of high-end guitar lead cable that the monitor is sitting on top of! But you probably realised that

Parabola