Karen's most recent SC/MP

[Phil__G]

Somehow I'd missed this, probably because it isnt in the "Vintage Computers" section. The design appears to be similar in many ways to the PICL, but has 32k of memory rather than 8k, and runs genuine NIBL as a 'real' SC/MP would, ie there are no PIC pseudo-ops for serial terminal access - its 'real' NIBL as nature intended. And since we all use FTDI rather than 'real' RS232 its a two-chip, full-memory NIBL system. This sounds interesting to me
Has anyone any experience of this build? Its dated 2019 so presumably is Karen's very latest emulation (though I note some instructions aren't included)
https://www.vintage-radio.net/forum/showthread.php?p=1154702#post1154702
Cheers
Phil

[Mark1960]

I don’t remember seeing this one. Karen posted most of her creations in the homebrew section, which is where I guess most of this type belong, though the moderators seem quite forgiving in the vintage computer section.

This reminds me of yet another unfinished project, an adapter to plug a pic into an MK14 replica. I stalled on that one as I wasn’t certain I could manage the software mods. Seems like Karen already did enough for it to work.

[SiriusHardware]

I actually think vintage computer specific homebrew projects belong better in this section, I often nearly or completely missed Karen's projects because she did follow canon and posted them in the homebrew section. Normally when she did post them there they were fully polished and finished, whereas OrtonView was not only a work in progress but a race against time.

[Phil__G]

I'm intrigued, so I'm going to make one up on vero, its only two chips.
I had a look at the pic code, inverted Flag 0 so theres no need for a
hardware inverter to the FTDI and found where to change the write-protect
from 4k to 2k for KB+ (for a later date)
NIBL will need upping to at least 300 baud as the FTDI wont do 110,
which is a shame as that would be proper retro
Interesting and yet a shame the project has not been more visible

[Mark1960]

The CH340 looks like it supports 110 baud according to the datasheet. I’m not sure if the drivers support this. Maybe check the CH340 module that you used on your 8k PICL.

RTS might also need to be inverted.

[ortek_service]

Well the CH340 WinXP (32bit) driver, at least (that I'd managed to find for it and have been using), lets you set it to 110 baud (with 75 baud the min setting, one below this).
- Although just trying Tera Term, that only lets you go down to 110 baud.

But I've just tried a loopback-test (on a 'WEMS.CC' CH340 Module I got 5off v.cheap via Aliexpress) with both of driver & Tera Term set to 110 baud and that at least seems to work OK with typed characters only echoing-back when Tx & Rx are linked together.

[Phil__G]

Thanks Owen, I'll give it a try - though I have changed the nibl embedded in the pic to 1200 - I'd like to try 110 just for giggles

[Phil__G]

Just awaiting a 10Mhz crystal... not the neatest but its just a trial.
I notice in the diagram, SenseA is grounded - possibly a mistake? NIBL doesnt use SenseA.

[audiokit]

I just was thinking, as it behaves like a real INS8060, would it be possible to run it in the sc/mp elektor environment?

[Phil__G]

I would expect so Benny, other than the SOUT/SIN pins and SIO instruction...
With a pin adapter I think it should also work in the MK14

[Mark1960]

Is it a 10MHz crystal to run at 110 baud? That wasn’t clear in Karen’s pdf, but she did say 10MHz to emulate 2MHz sc/mp and 20MHz to emulate 4MHz sc/mp.

[SiriusHardware]

Anyone know the historic reason for 110 baud? Nearly all other baud rates from 300 upwards are upward multiples 600, 1200, 2400, 4800, 9600, 19200, etc. Even the old 75 baud (as in 1200-75) is 300/4 (or 1200/16), so both baud rates can be derived from the same clock.

I'm guessing 110 baud pre-dates computers as we know them.

[Phil__G]

I just think 110 was as fast as a mechanical teletype device could manage.
Anywho, I couldnt wait for the crystals so tried a 20Mhz and changed the embedded NIBL code to 1200 baud,
inverted Flag 0 in the pic code & it works great:

[Phil__G]

https://youtu.be/INmYBrxteMs

[Phil__G]

Originally Posted by audiokit

I just was thinking, as it behaves like a real INS8060, would it be possible to run it in the sc/mp elektor environment?

Originally Posted by Phil__G

I would expect so Benny, other than the SOUT/SIN pins and SIO instruction...
With a pin adapter I think it should also work in the MK14

Now I've looked at the code a bit more, I'm not sure.
There's no page restriction on LD & ST so no below-zero references to the top of page zero - say a pointer contains 0FFF and gets incremented, a real SC/MP pointer would be at 0000 whereas this emulation would increment to 1000. Consequently all the stack & variables referenced by SCIOS as negative offsets from low memory but which actually live just below 0FFF would be addressed as FFFF and below. With the partial address decoding of the MK14 that might be ok, basically the MK14 ignores A12-A15 which are the 'misbehaving' bits. Maybe.

Theres also the NIBL load and the associated write-protect to disable, I have done that if you fancy giving it a try?

[Phil__G]

I've had a look through the code from Karens 2019 post
...and found that unfortunately the DAE/DAI bug has been carried through.
I've posted updated PIC software: https://www.mccrash-racing.co.uk/philg/picl/picl.htm#k2019
This has 2400bd NIBL with the bit7 bug fixed, the emulation has DAE etc fixed and you dont need an external
inverter on Flag0 (tx) so it connects directly to an FTDI. In due course I'll probably be adding the missing SOUT pin

This has to be the cheapest, easiest full-32k-memory NIBL machine, in two chips!

Cheers
Phil

[Mark1960]

If scios is consistent and only uses the wrap around to access ram at the top of page 0 then it might still work on a 64k ram system, but would be using ram at the top of memory instead of the top of page 0. Same goes for any memory map that has ram at FF00 to FFFF.

On an MK14 with only 12 address lines its almost sure to work, but might be some other problem not dicovered yet.

[Mark1960]

Looking through the datasheet for CH340 and found that the RXD input of the CH340G can be inverted by applying Vcc to RS232 input during power on reset. This means shorting pins 15 and 16 on the SOP16 would remove the need to invert the TX output for NIBL.

[Phil__G]

Thanks Mark, that could be useful on genuine INS8060 NIBLs, for this particular project its not necessary. I still have a few CH340Gs but for a while now I've preferred FTDIs as the handshaking actually works

[Mark1960]

Did you fit the link on the ch340 module to enable rts or cts?