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Old 17th May 2019, 2:05 pm   #41
G6Tanuki
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Default Re: Franklin VFO ?

Point taken about there being a bit more thought behind the original enquiry than just 'building an oscillator to get the Squadcal on air' !

One thing I vaguely remember from the couple of hours of lectures about oscillators I underwent 40 years back (most of which was actually about generating ramps/staircases for video/radar stuff and multi-phase clocks for digital circuitry...) was that the noise-power contribution of an oscillator increases more-slowly than it's intended output as that output power is increased.

So - other things being equal - it could make sense to generate the oscillations at high level then attenuate them down to the required level, since the attenuation will also attenuate the noise component.

(The downside, of course, is that you've got greater power-dissipation so greater self-heating of the oscillator components which is a bad thing from the stability-perspective).

I've always pondered if this concept might have somehow been behind the design of the local-oscillator in the TCS receiver - which uses a 12A6 power beam-tetrode!
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Old 17th May 2019, 3:20 pm   #42
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Default Re: Franklin VFO ?

Quote:
Originally Posted by G0HZU_JMR View Post
However, I have to say that this lashup version of the VE3RF oscillator I have in the screened box is probably the most stable 5MHz oscillator I've ever made and I've changed nothing on it since the initial build. I did include the subtle phase correction in the initial build. Up at 16MHz I think the gain/phase error will be less because there will be some phase shift in the overall circuit anyway at the higher frequency.
This supports my feeling that the Franklin is potentially more stable - all other things being equal - than most of the other oscillator types. I suspected the trade-off would mainly be phase noise against absolute stability, and the comments so far seem to confirm that.

I don't need this to get the radio on the air - I'm there already. The points of the exercise are :

1 A hands-on learning exercise in oscillator design and implementation.
2 A more elegant and appropriate solution, rather than driving a small, simple radio via a high function synthesizer. (This works well, but offends my sensibilities a bit).

The discussion so far forms a very useful part of objective 1 - thanks all round for the thoughts.
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Old 17th May 2019, 6:04 pm   #43
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Default Re: Franklin VFO ?

For a hands-on learning exercise, you have to try building several alternative types and compare them - built to comparable standards to keep the comparison valid. One oscillator alone tells whether that one works and what its performance is like but doesn't tell you whether another approach might have been different.

Building a lot of oscillators, and taking care over each one shows that the chosen circuit, IE the name, doesn't matter a great deal. You achieve stability by using suitably stable components and by diluting the variability of active device parameters by light coupling both in the driving and the sense paths. This latter comes down to scaling of values.

In quite general terms, the design choices which favour low phase noise tend to worsen temperature stability, and vice-versa. Though, there are ways to screw-up in one area without getting a benefit in the other.

The amplitude governing method in an oscillator relies on either driving an active device into cut-off, or into significant compression. It is remarkably difficult to make an oscillator which runs at low levels - especially one which can be relied on to start.

Some oscillators have a specialised level controller, a detector and a levelling amplifier controlling an AGC amplifier.

The BBC bought a number of HP 8656 synthesised signal generators to act as the RF oscillators for their world service transmitters. There's footage of one being operated, somewhere on the net

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Old 17th May 2019, 9:06 pm   #44
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Default Re: Franklin VFO ?

Quote:
Originally Posted by Radio Wrangler View Post
The amplitude governing method in an oscillator relies on either driving an active device into cut-off, or into significant compression. It is remarkably difficult to make an oscillator which runs at low levels - especially one which can be relied on to start.
It is also remarkably difficult to find any text book which gives a method of predicting oscillator amplitude! There is a lot of info out there about calculating frequency and what affects it - but try finding anything about calculating amplitude or how to design for a given amplitude and you'll find zilch. F Langford-Smith says the most when he mentions 'the necessary experimental work.' And that's it!

Years ago I built a Wien-bridge oscillator at 50Hz. I also needed to ensure that oscillation had established before something else (a high voltage power supply) was enabled, so I put a time delay to inhibit the power supply. But how long for? I couldn't calculate how long the Wien bridge oscillator would take to build up from noise. I sent a letter to Wireless World (no UKVRR then!) and it seemed nobody else could either. So it came to experimenting with a slow-time base 'scope.

I'm not an oscillator expert, but I am familiar in principle with the Franklin circuit, basically it just has one connection (plus ground) to the tuned circuit. The overall non-inverting amplifier with feedback from its output to its input just works as a negative impedance in parallel with the tuned circuit. So for a good, high-Q LC circuit the coupling thereto can, as stated, be extremely loose.

Isolating the active devices as much as possible from the LC circuit means that any variation in said devices will have correspondingly little effect. So stability, phase noise, harmonic content etc can be expected to be really low. The down side as I see it is that trying to couple a load to the tuned circuit will immediately degrade things. Taking the output instead from the middle of the amplifier will add the amplifier noise to the output - long-term frequency stability will be as good as the tuned circuit (obviously) but short-term phase noise will exist. How much, again, probably comes down to experiment, just as RW suggests!
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Old 18th May 2019, 12:16 am   #45
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Default Re: Franklin VFO ?

Some analysis & design material on oscillator amplitude in Clarke & Hess

https://www.slideshare.net/joseanton...larke-amp-hess

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Old 18th May 2019, 11:18 am   #46
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Default Re: Franklin VFO ?

Quote:
Originally Posted by G6Tanuki
One thing I vaguely remember from the couple of hours of lectures about oscillators I underwent 40 years back (most of which was actually about generating ramps/staircases for video/radar stuff and multi-phase clocks for digital circuitry...) was that the noise-power contribution of an oscillator increases more-slowly than it's intended output as that output power is increased.
Yes, other things being equal, you get better noise performance from a higher power oscillator. Of course, you are also likely to get worse stability performance.

Quote:
Originally Posted by kalee20
It is also remarkably difficult to find any text book which gives a method of predicting oscillator amplitude!
The amplitude will be such that whatever gain control mechanism is used sets the loop gain to be equal to 1.

Quote:
Years ago I built a Wien-bridge oscillator at 50Hz. I also needed to ensure that oscillation had established before something else (a high voltage power supply) was enabled, so I put a time delay to inhibit the power supply. But how long for? I couldn't calculate how long the Wien bridge oscillator would take to build up from noise. I sent a letter to Wireless World (no UKVRR then!) and it seemed nobody else could either. So it came to experimenting with a slow-time base 'scope.
The amplitude build-up before you reach the steady-state condition depends on two things:
1. the bandwidth of the loop - which in many cases will be the bandwidth of the resonator
2. the excess gain - which will probably be varying as the amplitude builds up
I am not surprised that nobody could give you a satisfactory answer. A minor change to your circuit would give a different result; it might depend on temperature and supply rail voltage too. If you could produce a good mathematical model of how your circuit loop gain varied with amplitude then you could write down and (hopefully) solve a differential equation giving the time variation of the amplitude. It is essentially a non-linear feedback servo problem.
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Old 18th May 2019, 1:14 pm   #47
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This may be of interest... many years ago I designed a basic 'trainer' 10.7MHz oscillator using a 50Ω MMIC gain stage and a (low) tapped resonator. It had a transformer splitter in the circuit that created an auxiliary 50Ω output port. This allowed the signal to be fed to a spectrum analyser. There was also a pair of 50Ω coaxial connection points that allowed the feedback path to be broken and the loop analysed on a network analyser. So direct measurements of gain margin, loaded Q, phase response and noise figure could be made using regular 50Ω lab gear . The option of fitting an attenuator and/or a delay line was possible at this point as well.

This allowed Leeson's equation to be demonstrated. I'm pretty sure I've posted about this old oscillator before on here and probably on Eevblog. Somewhere, I have some old phase noise plots taken of it with the company E5052A analyser. I dug it out yesterday and rebuilt it as I had pinched some parts from it a while ago. The plots below are for the group delay of the model of the resonator/oscillator and also of the real circuit. Both are measured in open loop at the 50R breakout point.

They agree very well and the loaded Q is about 41 with this resonator. By playing with the attenuator it is possible to control the loop gain. A loop delay can be added here as well (using coax cable) and the effect of spoiling the phase response can be explored. Because the MMIC is a well behaved 50R gain block with well controlled gain it is also possible to explore the region between regenerative gain and the onset of oscillation with this setup. I think I demonstrated it once as a regenerative detector but I had to tweak it down to the 40m band for this. It was possible to show the improvement in gain and selectivity as the loop gain was adjusted in tiny amounts.

It normally runs at 10.7MHz and this is twice the frequency of the Franklin oscillator. So that normally brings a 6dB penalty in phase noise. But because the MMIC has low flicker noise and because it runs at a higher power level and because I have the phase response optimised it is probably about 6-8dB better than the Franklin oscillator (in it current state) at offsets between 100Hz and 1kHz. It was only really designed to demonstrate Leeson's equation and it achieved this quite well I think. It wasn't designed to have ultra low phase noise or low drift.

This circuit is a bit like the Franklin oscillator in that it has two 180degree phase shift components in the loop. However, in this case the second one is a passive transformer and all the gain happens in the MMIC. I tap into the resonator at low impedance points in the resonator rather than tap into the top of the resonator. This seems to work really well and this suits the 50R MMIC. This setup makes it really easy to analyse and tinker with.
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Old 20th May 2019, 5:56 pm   #48
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I tried to find the Franklin oscillator in June '78 Radcom TT but couldn't locate that particular magazine. However, google did find the original article for the VE3RF Franklin VFO on page 64 here:

https://www.americanradiohistory.com...dio-198911.pdf

There are some interesting comments in the text. VE3RF seemed to be struggling for loop gain and had to up the capacitance of the coupling caps to 10pF to get it to start reliably. This hints at a very low loop gain and this may be due to the Idss of the JFETs he used. Maybe the Vds of the FETs was very low in his circuit due to a higher standing current through the 1k resistors? He only got 1.2Vpkpk RF at the output of the second JFET and this seems very low.

The various JFET models I played with gave huge variations in loop gain and hinted that with a 2N5484 and 10p coupling caps the (excess) loop gain was huge and the coupling caps could be as low as about 1-1.5pF before the loop gain fell below unity. With a 2N5486 the loop gain fell below unity even with 10pF caps. I tried changing the coupling caps in my 'real' test oscillator in the shielded box and I could reduce the caps down to 1.2pF and it still oscillated reliably. This agreed with the simulation very closely.

His circuit also has some shunt capacitance at the input to his buffer because he has a 62pF and 150pF capacitive tap ahead of the buffer amp. This buffer amp looks a bit dodgy especially as it directly feeds a LPF at the emitter but the capacitive tap does introduce some phase shift into the loop via an RC network.

Without this external shunt capacitance a simulation of the loop response looks like the plot below. This shows that the zero degree phase point (marker 2) is not aligned with the peak in loaded Q at marker 1. This is not good for stability. This was the first odd thing I spotted about this oscillator design and I think this is caused by the 1k drain impedance at the first JFET on the left. The external buffer capacitance does shift the phase back to where it should be but this does seem to be an unconventional fudge method. Who knows, maybe it is the work of genius because it might help with temperature compensation in some way but introducing an RC defined phase slope in the feedback loop is a bit odd. But it is there!

If this circuit was modified to operate at a higher frequency I'd be a bit concerned about the capacitance of any external buffer amplifier. By 18MHz there might not need to be much capacitance here and having an external shunt capacitance of (say) 62pF will affect the loop gain and phase around the loop as it will introduce a significant RC filter into the loop that will introduce a lot of phase shift and slope.

Normally, the only place you want any phase slope (at the operating frequency) is in the resonator and you want this slope to be very steep (at the zero phase crossing point) if you want good phase noise and stability. If you look at the phase vs gain vs loaded Q plots of my MMIC oscillator in post#47 you can see that the zero phase crossing point is centred at the peak in gain and the peak in loaded Q. This is how it should be for good phase noise and stability.
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Old 20th May 2019, 6:13 pm   #49
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Default Re: Franklin VFO ?

Much phase slope from anything other than the resonator raises the suspicion that stability may be compromised.

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Old 20th May 2019, 6:40 pm   #50
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Yes, and the other thing is the huge variation in loop gain with this circuit when Idss is varied up towards 6mA where the loop gain sharply declines. I don't have much experience with oscillators that have a hugely excessive loop gain but I doubt that this is good for stability either. I've not broken the loop and measured the 'real' circuit but I think the gain margin could be over 20dB with the 10pF caps.

I know that with my little MMIC trainer oscillator I can see the detrimental effects of excess loop gain. If I play with the attenuation in the feedback path (starting with way too much attenuation) I can watch the noise build up on the analyser like a regenerative detector as it approaches oscillation. By using fine attenuation steps and the Vsupply as an ultra fine tune of the loop gain I can control the noise peak and set it anywhere between -80dBm and full output at about +11dBm. The noise response gets narrower and more spiky as the level goes up. This demonstrates that the circuit is just producing a finer and finer spectrum of filtered noise as the (regenerative) loop gain escalates and the bandwidth narrows. It does all this at a constant centre frequency on the analyser and it eventually produces the response of the RBW filter in the spectrum analyser. So it 'looks' like a single frequency at the peak of the RBW once the level gets big enough.

But if I keep reducing the attenuation, the oscillator frequency then starts to shift sideways as the active device gets driven harder and harder into a non linear state. Leeson's equation begins to fail here too because I think the large signal noise figure of the MMIC degrades when driven too hard like this. The frequency stability is worse when in this state and this is only with about 6-7dB excess gain in the loop.
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Old 20th May 2019, 7:08 pm   #51
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Default Re: Franklin VFO ?

A good oscillator is a bit of a balancing act. I've spent a lot of years doing VCOs etc for synthesisers, once having designed a five-loop monster in the days before frac-N came along. The Franklin hasn't been one of my favourites and it seems to have fallen by the wayside as mainstream oscillator development bypassed it. But Granitehill seems to have decided that it's the one for him, and anyway, it's possible to do a fairly good job with almost any of the known circuits.

For oscillators in general: There has to be enough loop gain to get the thing to start in the first place, and this gain has to be achieved with only light coupling into the dominant resonator else the Q suffers and then the noise skirts widen. There has to be sufficient non-linearity to throttle back the gain to achieve a stable running amplitude but without the loading on the resonator worsening as the integral of gain over the full cycle backs off.

Achieving high enough levels for semiconductors to go non-linear to give governance of the amplitude without having tight coupling becomes difficult.

Chuck in the uncertainties of JFET parameters and the overall job is quite difficult.

Ulrich Rohde's synthesiser book (all versions... he kept revising it and adjusting the title to mention the then fashionable market areas) are usually an interesting read on types of oscillators. He goes into them with a low phase noise intent. I do get teased a bit about having bought a copy, though...

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Old 20th May 2019, 8:57 pm   #52
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Quote:
Originally Posted by G0HZU_JMR View Post
But if I keep reducing the attenuation, the oscillator frequency then starts to shift sideways as the active device gets driven harder and harder into a non linear state. Leeson's equation begins to fail here too because I think the large signal noise figure of the MMIC degrades when driven too hard like this. The frequency stability is worse when in this state and this is only with about 6-7dB excess gain in the loop.
This agrees with the various snippets of design information I've found across the years from various sources (G3VA's "Technical Topics" in particular). That is - the coupling capacitors should be reduced to the smallest value consistent with reliable starting. I'm fairly sure that too much coupling was reported to degrade stability, and possibly other issues (spurious oscillations, noise ?).

None of this puts me off, as I'm not in the business of building a state of the art signal source. Rather, the exercise might be compared with - for example - building a regenerative receiver using modern components. Basically - to see how well it works, and how comparable it can be to the conventional approach.

Curiousity, and perhaps a bit of eccentricity is the driver, I think.
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Old 20th May 2019, 9:26 pm   #53
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Quote:
This agrees with the various snippets of design information I've found across the years from various sources (G3VA's "Technical Topics" in particular). That is - the coupling capacitors should be reduced to the smallest value consistent with reliable starting. I'm fairly sure that too much coupling was reported to degrade stability, and possibly other issues (spurious oscillations, noise ?).
In theory at least, the loaded Q should keep going up as the coupling caps are reduced. A doubling in loaded Q should improve the phase noise by about 6dB. However, once the ratio between unloaded and loaded Q starts to tumble, the insertion loss in the resonator will become significant and it will affect the phase noise result. So there comes a point when it doesn't bring much benefit in phase noise. Leeson's equation doesn't have an entry for resonator loss and I usually degrade the noise figure of the active device by the loss in the resonator (in dB) to cater for this.

The other way to do it is to measure the resonator power the conventional way and then enter a lower figure for the power into the spreadsheet that allows for resonator losses.

I think the little MMIC trainer only shifts about 20Hz (at 10.7MHz) between an initial noise peak of -50dBm and something that looks like a regular oscillation signal at 0dBm as the loop attenuation is reduced. The regular output is about 11 or 12dBm although it can go up to +16dBm with a bit more MMIC bias and no attenuation in the feedback. However, I'm not changing the loaded Q when I do this. I do recall playing with the resonator tap points when sat in front of the E5052A analyser at work and there wasn't much change in phase noise because I think my resonator has 2 or 3dB loss and I ended up trading insertion loss against loaded Q with little benefit. But I didn't do this in a very controlled manner.
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Old 21st May 2019, 12:06 am   #54
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I couldn't resist trying the MMIC oscillator in the shielded enclosure when set for a loop gain margin of just over 1dB and a lowish output power. This required 5dB attenuation in the feedback and a reduction in bias current to 27mA. This keeps it close to that sweetspot region where the onset of oscillation (rising from the regenerative noise peak) only gives a 20Hz shift in frequency

There is about -5dBm at the analyser but this is via a 10dB attenuator. So the power that is split to the resonator is (+5dBm - 5dB) in the feedback attenuator = 0dBm.

Because this is a 5V MMIC and I'm biasing it from about 12V via a dropper resistor and an active supply filter circuit there is about 330mW Pdiss on the PCB. This means that this oscillator drifts a fair bit from cold. However, I left it for 45minutes in the enclosure to stabilise and then measured the drift at just 60Hz in an hour and a half! This is at twice the frequency of the 5.2MHz Franklin oscillator. The close in noise plot on a 100Hz span is given below and this is notably cleaner than the 100Hz plot of the (already impressive) Franklin circuit given earlier post #32 and I've repeated this plot below on the right.

At this lower power level and with minimal gain margin in the feedback the trainer oscillator now has a sharper and cleaner peak and it shows less phase noise close to carrier. I think it just edges out the Franklin oscillator on drift as well. However, the MMIC oscillator would be a worse choice as a VFO because of the warmup drift. Also, I suspect it will drift a lot if I were to subject it to a step change in temperature.

It would be interesting to try building this circuit with the MMIC on an ally heatsink and with a remote airwound resonator a few inches away. This would hopefully improve the warmup drift.
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Old 21st May 2019, 1:08 am   #55
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It's been on for about an hour since the 100Hz plot was taken and the oscillator has only drifted about another 25-30Hz in all that time. Impressive stuff!

I also noted that the earlier 100Hz plot had 8 averages on it but I don't think this matters much when the analyser is on a narrow span like this. The plot below has averaging turned off and it looks about the same and the carrier peak level is the same with averaging off.

The crazy 50Hz sidebands are also visible on these plots and this issue is affecting this oscillator and the Franklin when they are placed in the shielded box.

The only frequency determining parts are the resonator coil and the resonator caps. These caps are high quality porcelain parts from AT Ceramics. However, I suspect that this doesn't matter much on a test like this because the temperature inside the shielded enclosure must be quite stable.
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Old 21st May 2019, 1:36 am   #56
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To show that the 50Hz sidebands are not in the analyser, see the plot of my Marconi 2024 sig gen. There are no visible 50Hz sidebands although they are there at about -110dBc if I increase the range of the vertical scale.

The plot also shows how clean the (synthesised) Mi 2024 sig gen is and also how clean the spectrum analyser is when in this sub 40MHz SSA mode. Suddenly, even the MMIC trainer oscillator looks noisy in comparison! However, this Mi 2024 sig gen has the exotic high spec OCXO reference in it and it has very low close to carrier phase noise and this sets it apart from other Mi 2024 sig gens with the standard ref oscillator. I'm not sure if a regular 2024 sig gen would look this clean on a 100Hz span.
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Old 21st May 2019, 6:54 am   #57
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Default Re: Franklin VFO ?

The cleanliness of that plot of the 2024 surprises me. I've been using 2024s for some receiver testing over the past few years and had to change to HP8662s because of noise floor. The 2024 does do rather well for control of its frac-N noise pedestal.

A large number of Marconi 2024s hit the surplus market, all with the ovened freq standard, the high output level option and the fast pulse modulator. They were real bargains!

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Old 22nd May 2019, 10:29 pm   #58
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Yes, at the time I bought a batch three of them because the prices were so low. I sold on two of them and kept the best one. It only had 120 hours' use on the internal usage timer and looked new even though it was quite old.

At work I managed to get hold of one of the E5052A analysers to do some testing of the Franklin oscillator and the MMIC oscillator. Sadly, this E5052A doesn't function on its baseband input port and I think this is because it is a discontinued/unsupported option on the E5052 'A' version. So on the first day I could only test the 10.7MHz MMIC oscillator as this E5052A only works down to 10MHz.

The most disappointing thing was the awful amount of RFI in our work labs. My work area is surrounded by wall wart chargers and power supplies and various power and networking systems. Plus there is a lot of high power equipment being worked on. So there is lots of spurious pickup across 10Hz through 100kHz on the E5052A plots. Sorry about this!

I hope it's OK to add these plots as some people may find them interesting from a noise theory point of view. The MMIC works best (in terms of low phase noise) with 2dB attenuation in the feedback and this means the gain margin is about 4dB. So it is fairly compressed when oscillating and it produces about +12dBm at the PCB output port. The loaded Q is 41, the system noise figure is about 9dB and this accounts for resonator loss and a slightly degraded noise figure for the MMIC as it is in compression. So this 9dB figure is a fudge factor and it is quite normal for this part of leeson's equation to be 'fudged to fit'. I think the fudge amounts to about 1dB of adjustment so nothing major in this case. The MMIC has a typical NF of 6dB on the datasheet so not a great example of a low noise MMIC but it is fine for this type of demo.

I set the flicker corner at 2kHz but this number varies with device current etc. In the plot the slope of the phase noise is still 20dB/decade between 1kHz and 10kHz so the flicker corner might be a bit lower than I thought with this MMIC at this current setting. The oscillator output is about 12dBm so there is 10dBm at the resonator after the feedback attenuation. Putting these numbers into Leeson's equation produces the graph below and I've also included the plot from the E5052A. The agreement is very good I think although the awful noise pickup in the lab spoils things a bit.

I chose a MMIC for the Leeson demonstration because it is a well defined amplifier in terms of gain and noise figure and port impedance. It also runs in class A so the results really should be very close to those predicted by Leeson. I've added blue dots on the E5052A plot and these correspond to the Leeson graph on the right. I think this demonstration deserves a better test setup than this and I have to apologise for all the noise pickup in the lab. I'm not sure how to improve on this, we used to have a big metal/screened 'quiet' room for this stuff but that got sold off years ago. There are a few R&S TS7124 shielded boxes available at work but I don't think these will help down at these frequencies. They are very heavy so I'm not to keen to try one. I might try and find a mu metal enclosure but I have no idea how big/thick it would need to be. The alternative is to move the E5052A to a quieter location.
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Old 22nd May 2019, 10:52 pm   #59
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Default Re: Franklin VFO ?

Here's a plot of the MMIC phase noise at a much lower power level and the corresponding Leeson simulation graph. In this case the feedback attenuation is 5dB so the power arriving at the resonator is -8.8 -5 = -13.8dBm. The MMIC was biased at a lower current (down to 24mA from 40mA) and this appears to have removed nearly all the flicker noise on the E5052A plot. So I turned down the flicker corner frequency in the simulation to make the two curves match better. I don't think this is cheating but I was surprised to see the 30dB/decade flicker slope vanish from the E5052A measurement of the real MMIC oscillator.

The overall phase noise is just over 20dB higher. The resonator power is 22.8dB lower and the flicker contribution is less so it looks like the noise is about 20dB or so worse in most places just as predicted by the Leeson graph on the right. The MMIC isn't oscillating reliably in this case but it does show that the noise still follows theory even when the MMIC is oscillating at a very low level that is way off its normal compression point.

This stuff is all a bit nerdy but the aim here is to show that the phase noise of an oscillator can still be quite reasonable even at a low level of energy storage in the resonator. This last example is at a resonator input power of -14dBm and the phase noise is still reasonable for ham use as it is probably better than a lot of 1980s and 1990's (synthesised) HF transceivers.

I did try adjusting the the Franklin oscillator circuit up to 10.7MHz today and I also reduced the size of the coupling caps and took some plots with the E5052A. Sadly I goofed up on the plot transfer to FDD. I'm hoping they are
still on the internal HDD. But the results weren't that great. I used a 100pF resonator cap and there was about 15Vpkpk in the resonator at 10.7MHz. So I think there was about +5dBm in the resonator. Sadly, the phase noise was a bit disappointing. From memory, it only managed about -113dBc/Hz at 1kHz and about -135dBc/Hz at 10kHz offsets. Also, the phase noise was a bit floaty and inconsistent in this region. So something wasn't right. I couldn't see any obvious instability but the second JFET showed some clamping of the waveform at the gate. I think there may have been too much loop gain. I think this is the junction going into forward conduction and maybe this affects the phase noise a bit. It seemed about 10dB worse than predicted by Leeson. Also, I'm not sure how much the stray RC time constants in the loop affect the response at these higher frequencies. This oscillator definitely needed a bit of optimising but I really don't want to spend much time on it. I'm not sure the basic circuit is ideal and I think it needs to be designed to make the loop gain more predictable and also to minimise any clamping in the second JFET.
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Old 28th May 2019, 12:07 am   #60
G0HZU_JMR
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Default Re: Franklin VFO ?

I mentioned earlier that I might try the MMIC on a heatsink to see if it improves the warmup. I tried this today when listening to the football and the initial results are quite good I think. I changed the MMIC to a low noise low power device that runs at about 15mA. I also used an air cored inductor and I mounted the MMIC direct onto a fairly thick tinned plate and this was screwed onto a heatsink.

On a thermal camera the MMIC warms up and stabilises in just a few seconds now. Before, when it was fitted to a regular/skinny PCB, it would take ages to thermally settle on the camera. With the current setup with the heatsink I've mounted it as if it is a high power device so it achieves thermal stability really quickly at just 15mA at 4.5V.

I left it a long time to cool off and the plot below is a warmup plot and the scale is 50Hzdiv and the x axis is time in seconds. The plot misses the first 1 or 2 seconds because the counter has to be gated before I can start my logging SW. However, the oscillator drifts down maybe 400Hz in just over 1 second from cold and then stabilises as in the plot below. I think I can get it better than this and the slow drift upwards can be improved with a better heatsink. As it stands I suspect that this would be useable in a receiver as it is very stable after maybe 5 or 6 seconds. At 5MHz instead of 10MHz the gradual upwards drift would hopefully be halved.
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