Non-working Commodore PET 3016 - Page 59 - UK Vintage Radio Repair and Restoration Discussion Forum

Mark1960 · 18th Mar 2021, 7:00 pm

Also I think UB2-8 should be high only for one quarter of the time, so the links may not be correct for 16K.

I don’t think that would stop the pet from working, but should check the link settings.

SiriusHardware · 18th Mar 2021, 7:07 pm

Actually I think it's OK for the BANK SEL signal to be 50/50 because the first 32K is reserved for system RAM (and nothing else) whether it is fully occupied by RAM or not. If you want to try to write to or read from RAM which isn't actually fitted, well, that's your affair...

Mark1960 · 18th Mar 2021, 7:21 pm

Quote:

Originally Posted by SiriusHardware

Actually I think it's OK for the BANK SEL signal to be 50/50 because the first 32K is reserved for system RAM (and nothing else) whether it is fully occupied by RAM or not. If you want to try to write to or read from RAM which isn't actually fitted, well, that's your affair...

I just thought it possible that if the 16K is mirrored at 0-3FFF and 4000-7FFF that it could cause some issue with the pet detecting how much ram is fitted. It might write over zero page and stack while testing ram from 4000-7FFF.

Also if one of the links is missing, the input to the 7425 would be floating. Probably not a major issue for standard TTL but could be unreliable in the longer term.

ScottishColin · 18th Mar 2021, 7:54 pm

So in a slightly embarrassing way, I have to report my previous waveform was from UB3-8, not UB2-8. Apologies.

UB2-8 stays at zero on the scope and does not shift.

I can confirm continuity as below checks out ok.

Colin.

Quote:

Originally Posted by SiriusHardware

Quote:

UB2-8 screenshot attached

!!?? You have a waveform on UB2-8 but you don't have the same waveform on UG7 pin 11? Please confirm that and if true, with power off, check continuity between

UB2 pin 8 and UG7 pin 11

and

UB2 pin 8 and UH5 pin 2

SiriusHardware · 18th Mar 2021, 8:18 pm

Well, that's still interesting despite the brief diversion as it means we really don't have a BANK SEL signal.

If you could now please scope the input pins on UB2 pins 9, 10,12,13 and let us see what's there? Ideally we need a 3-input scope at this point, but never mind.

Can you capture:-

UB2 pin 9 (channel 1) and UB2 pin 10 (channel 2)

UB2 pin 9 (channel 1) and UB2 pin 12 (channel 2)

UB2 pin 9 (channel 1) and UB2 pin 13 (channel 2)

Try to get at least one complete cycle of the pin 9 waveform on the screen in each case.

ScottishColin · 18th Mar 2021, 10:29 pm

Attached.

Colin.

Quote:

Originally Posted by SiriusHardware

Well, that's still interesting despite the brief diversion as it means we really don't have a BANK SEL signal.

If you could now please scope the input pins on UB2 pins 9, 10,12,13 and let us see what's there? Ideally we need a 3-input scope at this point, but never mind.

Can you capture:-

UB2 pin 9 (channel 1) and UB2 pin 10 (channel 2)

UB2 pin 9 (channel 1) and UB2 pin 12 (channel 2)

UB2 pin 9 (channel 1) and UB2 pin 13 (channel 2)

Try to get at least one complete cycle of the pin 9 waveform on the screen in each case.

buggies · 18th Mar 2021, 10:37 pm

If it makes things any easier, I could loan Colin a logic probe (with pulse stretching). It has been kicking around in my toolbag for a good few years but I tested it this evening and it reliably detects a 100ns pulse every 100ms and indicates the correct polarity.

SiriusHardware · 18th Mar 2021, 10:42 pm

I've also made a bit of progress with the 2716 / 28C16 to PET PROM socket adaptor. I've gone for the 'stacked sockets' approach.

On the PET PROM sockets, pin 21 is CS3 and tied to +5V. On the 2716 and 28C16, pin 21 is VPP and WE respectively, both of these pins need to be held at +5V for their respective devices to work in read mode, so no alteration is required there.

PET PROM socket pin 20 is the active-low CS1 and the same pin on the 2716 and 28C16 performs an equivalent active-low chip enable / output enable function.

The only aberration is pin 18, which on the PET PROM socket is A11. On conventionally pinned devices this pin is another active-low chip enable / output enable, so in this case the pin joining the upper socket pin 18 to the lower socket pin 18 has been snipped and taken by a small wire link to pin 20 of the upper socket so that the active-low enable signal going to pin 20 also goes to pin 18 on the substitute device.

Since the 2716 and 28C16 are 2K devices, this means they don't have an A11 pin so if plugged into the UD9 socket for example any code programmed into them will appear at both F000- and F800- I don't see this being a problem. The test code I have is intended to run at x800 onwards, in the upper half of the block.

SiriusHardware · 18th Mar 2021, 11:05 pm

Ref: The results in #1166. Nicely done.

I take it the pin 9 signal in all of those was the yellow (lower) trace?

What your captures tell us is that there are times when all four of those chip inputs are low (0V) at the same time. One cycle on pin 9, which comes from buffered A15, represents one full sweep through all of the address range with the falling edge marking the beginning of the sweep at address 0000.

Two of the inputs are low full-time, probably held that way by links, and one other, pin 13, is low at the same time as all the others for at least some of the time.

When all of the input pins of that UB2 gate are low at the same time, we should see a high (4-5V) out of UB2 pin 3, but we do not. This would suggest that the UB2 gate is faulty. However, please check that you definitely have a 'high' (4-5V) on the 'G' enable pin, pin 11, of UB2.

SiriusHardware · 18th Mar 2021, 11:11 pm

I did idly wonder if the other gate in UB2 is used for anything because if not we could perhaps have tried to patch the unused-hopefully-OK gate in, Tim style, to see if that made a difference.

Unfortunately the other gate is used, as part of the address decoder on sheet 1. If we conclude that we have to replace UB2, doing so might even fix a few other problems which we don't even know we have yet.

SiriusHardware · 18th Mar 2021, 11:22 pm

One other thing we ought to check, with power off, is the resistance between UB2 pin 8 and 0V, black lead on 0V. It's possible that the output of UB3 could be OK but is being held low by a faulty UH5 pin 2 or UG7 pin 11.

When I said this earlier

Quote:

we should see a high (4-5V) out of UB2 pin 3, but we do not

I meant that we should see a high out of UB2 pin 8, not pin 3, but it was pin 8 that Colin was looking at earlier and seeing no activity on.

And incidentally we can now say that Mark is correct, that if UB2 was working as it should then the BANK SEL signal would be active only for the first quarter of the address sweep, equivalent to the first 16K.

ScottishColin · 18th Mar 2021, 11:36 pm

UB2-11 goes high on the scope and with a meter I can confirm the voltage is 5.16V.

Colin.

Quote:

Originally Posted by SiriusHardware

Ref: The results in #1166. Nicely done.

I take it the pin 9 signal in all of those was the yellow (lower) trace?

What your captures tell us is that there are times when all four of those chip inputs are low (0V) at the same time. One cycle on pin 9, which comes from buffered A15, represents one full sweep through all of the address range with the falling edge marking the beginning of the sweep at address 0000.

Two of the inputs are low full-time, probably held that way by links, and one other, pin 13, is low at the same time as all the others for at least some of the time.

When all of the input pins of that UB2 gate are low at the same time, we should see a high (4-5V) out of UB2 pin 3, but we do not. This would suggest that the UB2 gate is faulty. However, please check that you definitely have a 'high' (4-5V) on the 'G' enable pin, pin 11, of UB2.

ScottishColin · 18th Mar 2021, 11:38 pm

No matter which setting I put the meter on, it stays at 1 when I try to measure resistance between UB2-8 and 0V.

Colin

Quote:

Originally Posted by SiriusHardware

One other thing we ought to check, with power off, is the resistance between UB2 pin 8 and 0V, black lead on 0V. It's possible that the output of UB3 could be OK but is being held low by a faulty UH5 pin 2 or UG7 pin 11.

When I said this earlier

Quote:

we should see a high (4-5V) out of UB2 pin 3, but we do not

I meant that we should see a high out of UB2 pin 8, not pin 3, but it was pin 8 that Colin was looking at earlier and seeing no activity on.

And incidentally we can now say that Mark is correct, that if UB2 was working as it should then the BANK SEL signal would be active only for the first quarter of the address sweep, equivalent to the first 16K.

SiriusHardware · 18th Mar 2021, 11:40 pm

Right, then my money is on UB2 faulty. You can wait for a show of hands, or just go for it.

ScottishColin · 18th Mar 2021, 11:54 pm

Already ordered.

Colin.

Quote:

Originally Posted by SiriusHardware

Right, then my money is on UB2 faulty. You can wait for a show of hands, or just go for it.

Mark1960 · 19th Mar 2021, 12:16 am

Just to be safe, don’t try powering on the pet with UB2 removed until you have its replacement fitted. Ttl inputs float high and you could end up with two different devices trying to drive the same bus.

ScottishColin · 19th Mar 2021, 12:22 am

Understood - thanks.

Colin.

Quote:

Originally Posted by Mark1960

Just to be safe, don’t try powering on the pet with UB2 removed until you have its replacement fitted. Ttl inputs float high and you could end up with two different devices trying to drive the same bus.

ScottishColin · 20th Mar 2021, 6:07 pm

OK - UB2 removed, resocketed, replaced.

Blank screen with 6502 plugged in directly, monitor has power.

CPU plugged into my NOP device, I get random characters as before.

Colin.

julie_m · 20th Mar 2021, 6:49 pm

So it's still getting as far as clearing the screen, but not getting anywhere after that. There must be another fault stopping it getting any further. The RAM is an entire subsystem that relies on several support logic chips as well as the DRAMs themselves; there is the refreshing and the multiplexing of the address buses, and another pair of those 74LS244s to enable the inputs and outputs.

What's happening at UB2 pin 8, with the NOP adaptor in place so the processor is working through all of memory?

SiriusHardware · 20th Mar 2021, 7:57 pm

Yes, what Julie said?

If there is now activity on UB2 pin 8, could you capture UB2 pin 9 (one whole cycle of that waveform) along with UB2 pin 8 so we can see if we are now getting BANK SEL for the first quarter of the sweep. (This is with the NOP device in).

If still no activity on UB2 pin 8, hold fire and just report back.

18th Mar 2021, 7:00 pm	#1161
Mark1960 Octode Join Date: Mar 2020 Location: Kitchener, Ontario, Canada Posts: 1,294	Re: Non-working Commodore PET 3016 Also I think UB2-8 should be high only for one quarter of the time, so the links may not be correct for 16K. I don’t think that would stop the pet from working, but should check the link settings.

18th Mar 2021, 7:07 pm	#1162
SiriusHardware Dekatron Join Date: Aug 2011 Location: Newcastle, Tyne and Wear, UK. Posts: 11,546	Re: Non-working Commodore PET 3016 Actually I think it's OK for the BANK SEL signal to be 50/50 because the first 32K is reserved for system RAM (and nothing else) whether it is fully occupied by RAM or not. If you want to try to write to or read from RAM which isn't actually fitted, well, that's your affair...

18th Mar 2021, 8:18 pm	#1165
SiriusHardware Dekatron Join Date: Aug 2011 Location: Newcastle, Tyne and Wear, UK. Posts: 11,546	Re: Non-working Commodore PET 3016 Well, that's still interesting despite the brief diversion as it means we really don't have a BANK SEL signal. If you could now please scope the input pins on UB2 pins 9, 10,12,13 and let us see what's there? Ideally we need a 3-input scope at this point, but never mind. Can you capture:- UB2 pin 9 (channel 1) and UB2 pin 10 (channel 2) UB2 pin 9 (channel 1) and UB2 pin 12 (channel 2) UB2 pin 9 (channel 1) and UB2 pin 13 (channel 2) Try to get at least one complete cycle of the pin 9 waveform on the screen in each case.

18th Mar 2021, 10:42 pm	#1168
SiriusHardware Dekatron Join Date: Aug 2011 Location: Newcastle, Tyne and Wear, UK. Posts: 11,546	Re: Non-working Commodore PET 3016 I've also made a bit of progress with the 2716 / 28C16 to PET PROM socket adaptor. I've gone for the 'stacked sockets' approach. On the PET PROM sockets, pin 21 is CS3 and tied to +5V. On the 2716 and 28C16, pin 21 is VPP and WE respectively, both of these pins need to be held at +5V for their respective devices to work in read mode, so no alteration is required there. PET PROM socket pin 20 is the active-low CS1 and the same pin on the 2716 and 28C16 performs an equivalent active-low chip enable / output enable function. The only aberration is pin 18, which on the PET PROM socket is A11. On conventionally pinned devices this pin is another active-low chip enable / output enable, so in this case the pin joining the upper socket pin 18 to the lower socket pin 18 has been snipped and taken by a small wire link to pin 20 of the upper socket so that the active-low enable signal going to pin 20 also goes to pin 18 on the substitute device. Since the 2716 and 28C16 are 2K devices, this means they don't have an A11 pin so if plugged into the UD9 socket for example any code programmed into them will appear at both F000- and F800- I don't see this being a problem. The test code I have is intended to run at x800 onwards, in the upper half of the block.

18th Mar 2021, 11:05 pm	#1169
SiriusHardware Dekatron Join Date: Aug 2011 Location: Newcastle, Tyne and Wear, UK. Posts: 11,546	Re: Non-working Commodore PET 3016 Ref: The results in #1166. Nicely done. I take it the pin 9 signal in all of those was the yellow (lower) trace? What your captures tell us is that there are times when all four of those chip inputs are low (0V) at the same time. One cycle on pin 9, which comes from buffered A15, represents one full sweep through all of the address range with the falling edge marking the beginning of the sweep at address 0000. Two of the inputs are low full-time, probably held that way by links, and one other, pin 13, is low at the same time as all the others for at least some of the time. When all of the input pins of that UB2 gate are low at the same time, we should see a high (4-5V) out of UB2 pin 3, but we do not. This would suggest that the UB2 gate is faulty. However, please check that you definitely have a 'high' (4-5V) on the 'G' enable pin, pin 11, of UB2.

18th Mar 2021, 11:11 pm	#1170
SiriusHardware Dekatron Join Date: Aug 2011 Location: Newcastle, Tyne and Wear, UK. Posts: 11,546	Re: Non-working Commodore PET 3016 I did idly wonder if the other gate in UB2 is used for anything because if not we could perhaps have tried to patch the unused-hopefully-OK gate in, Tim style, to see if that made a difference. Unfortunately the other gate is used, as part of the address decoder on sheet 1. If we conclude that we have to replace UB2, doing so might even fix a few other problems which we don't even know we have yet.

18th Mar 2021, 11:40 pm	#1174
SiriusHardware Dekatron Join Date: Aug 2011 Location: Newcastle, Tyne and Wear, UK. Posts: 11,546	Re: Non-working Commodore PET 3016 Right, then my money is on UB2 faulty. You can wait for a show of hands, or just go for it.

19th Mar 2021, 12:16 am	#1176
Mark1960 Octode Join Date: Mar 2020 Location: Kitchener, Ontario, Canada Posts: 1,294	Re: Non-working Commodore PET 3016 Just to be safe, don’t try powering on the pet with UB2 removed until you have its replacement fitted. Ttl inputs float high and you could end up with two different devices trying to drive the same bus.

20th Mar 2021, 6:07 pm	#1178
ScottishColin Octode Join Date: May 2012 Location: Perth, Scotland Posts: 1,802	Re: Non-working Commodore PET 3016 OK - UB2 removed, resocketed, replaced. Blank screen with 6502 plugged in directly, monitor has power. CPU plugged into my NOP device, I get random characters as before. Colin.

20th Mar 2021, 6:49 pm	#1179
julie_m Dekatron Join Date: May 2008 Location: Derby, UK. Posts: 7,735	Re: Non-working Commodore PET 3016 So it's still getting as far as clearing the screen, but not getting anywhere after that. There must be another fault stopping it getting any further. The RAM is an entire subsystem that relies on several support logic chips as well as the DRAMs themselves; there is the refreshing and the multiplexing of the address buses, and another pair of those 74LS244s to enable the inputs and outputs. What's happening at UB2 pin 8, with the NOP adaptor in place so the processor is working through all of memory? __________________ If I have seen further than others, it is because I was standing on a pile of failed experiments.

20th Mar 2021, 7:57 pm	#1180
SiriusHardware Dekatron Join Date: Aug 2011 Location: Newcastle, Tyne and Wear, UK. Posts: 11,546	Re: Non-working Commodore PET 3016 Yes, what Julie said? If there is now activity on UB2 pin 8, could you capture UB2 pin 9 (one whole cycle of that waveform) along with UB2 pin 8 so we can see if we are now getting BANK SEL for the first quarter of the sweep. (This is with the NOP device in). If still no activity on UB2 pin 8, hold fire and just report back.