Non-working Commodore PET 3016

[ScottishColin]

OK - I tried an experiment this morning and managed to extract UF9 intact.

For a brief period, I could confirm that with UF9 in, I still get semi-colons, and with UF9 out, I got the checkerboard pattern.

That's stopped and I'm a little confused about some continuity tests I'm doing.

Can someone confirm for me where Pins 1, 10 and 20 are supposed to connect to please for testing without power on? What I currently get is continuity between pins 1 ad 10, and brief continuity between 1/20 and 10/20.

I'm pretty sure I'm not supposed to have a connection between 1 and 10 - is that right?

Colin.


Colin.

[SiriusHardware]

Pin 10 is the chip's 0V connection. Pin 1 serves another function but in this particular case is also connected permanently to 0V, so yes, there should be a direct connection between pin 10 and pin 1. Pin 20 is the chip's +5V connection.

When you check the resistance between pin 20 and pin 10 or pin 1, what you are actually measuring is the resistance between +5V and 0V, which includes the resistance of all the other chips connected between +5V and 0V, -and- any capacitors which are connected across the 5V supply as well. The brief burst of continuity / low resistance you see will be caused by those capacitors initially not being charged, and then charging up from the voltage that the meter itself outputs on the probes.

Long story cut short: Nothing to worry about.

In future it is always best to use your usual method of removal whenever the device involved is a cheap, easily replaced item like a TTL IC. When I hinted that you might, at some point, need to try taking ICs out intact it was really the video RAM ICs I was thinking that you might need to do that with (but we don't need to do that just yet).

[ScottishColin]

OK -thanks.

I have the checkerboard pattern now on the screen.

Colin.

[SiriusHardware]

That's good, and that's where we benefit from the knowledge of the other PET owners past and present - I would not have known to expect that pattern, and there it is.

With UF9 out, power on, look on the SD0 to SD7 inputs to that chip (on the socket) to see what the data lines look like now that UF9 is out of circuit. Are they still all steady-state or do you see activity on those now?

[ScottishColin]

I checked pins 2, 19, 5, 16, 6, 15, 9 and 12 on UF9 with the chip out.

All are zero with no waves, with the exception of pin7 which goes to 2V steady (checked with a meter).

Colin.

Originally Posted by SiriusHardware

That's good, and that's where we benefit from the knowledge of the other PET owners past and present - I would not have known to expect that pattern, and there it is.

With UF9 out, power on, look on the SD0 to SD7 inputs to that chip (on the socket) to see what the data lines look like now that UF9 is out of circuit. Are they still all steady-state or do you see activity on those now?

[SiriusHardware]

But you still have activity on the SA0-SA9 lines of UF7/UF8? And the pin 10s of those ICs are still constantly high, no waveform?

Edit: Just noticed you mainly checked the outputs of UF9 rather than the inputs.

Look on UF9 socket pins 3,18,4,17,7,14,8,13, is there activity there or are they steady state? (I know you've already said 7 = steady state 2V, what about the others?)

[ScottishColin]

All high at 4.14V (checked with a meter). No waverform.

Apologies for previous post - when I said pin 7 I meant pin 12 (which is the 7th on the list is my only excuse).

Colin.

Originally Posted by SiriusHardware

But you still have activity on the SA0-SA9 lines of UF7/UF8? And the pin 10s of those ICs are still constantly high, no waveform?

Edit: Just noticed you mainly checked the outputs of UF9 rather than the inputs.

Look on UF9 socket pins 3,18,4,17,7,14,8,13, is there activity there or are they steady state? (I know you've already said 7 = steady state 2V, what about the others?)

[SiriusHardware]

It's OK for pin 12 to be the odd man out on the output side because, while most of the outputs go to the character generator UF10 that output goes to UG9.

The static signals on SD0-SD7 aren't so welcome, though.

If possible can you do a scope capture of the signals on UF8 pins 5 and 6, one above the other so we can see them both together and the relationship between them? Ideally we want about 10 to 16 cycles of the pin 5 signal and whatever the pin 6 signal looks like at the same time.

When you've got that can you also do a similar dual capture with UF9 socket pin 11 (Video Latch) on the upper trace, again about 10 to 16 cycles of that, and UF8 pin 5 on the lower trace?

And just to confirm, when you said

All high at 4.14V (checked with a meter). No waveform.

..that included the RAM (UF7 and UF8) pin 10s as well?

[Refugee]

There will only be a pretty short burst of activity per vertical scan if it is trying to display a command prompt on an otherwise blank screen.
The remainder will be no activity.

[SiriusHardware]

At the moment we don't think the system is clearing / writing anything to the video RAM as no write to-video-ram activity is seen during initialisation.

The best guess for what we might expect to see from un-initialised RAM would be random characters, in which case the video RAM data lines ought to be highly active and changing all the time as the SA0-SA9 lines are repeatedly swept through the whole address range. (The video RAM CS lines are permanently low and the R/W lines held steady high, so changes on the address lines should be producing changes on the data outputs).

[ajgriff]

All this seems to suggest that the video RAMs and character ROM are doing as they're told ie, displaying semicolons or the checkerboard with UF9 removed. Doesn't this imply that there's a problem in the food chain prior to UF9?

Alan

[ScottishColin]

OK - I went too quickly. Let's try this again.

SA0-SA9 on both UF7 and UF8 all have square waves a c. 4V.

Both UF7 and UF8 pin 10 are high at 4.14V.

All pins noted below on UF9 go high and steady at c. 4V.

Colin.

Originally Posted by SiriusHardware

But you still have activity on the SA0-SA9 lines of UF7/UF8? And the pin 10s of those ICs are still constantly high, no waveform?

Edit: Just noticed you mainly checked the outputs of UF9 rather than the inputs.

Look on UF9 socket pins 3,18,4,17,7,14,8,13, is there activity there or are they steady state? (I know you've already said 7 = steady state 2V, what about the others?)

[ScottishColin]

Traces below.

https://drive.google.com/file/d/1-wb...ew?usp=sharing

Colin.

Originally Posted by SiriusHardware

It's OK for pin 12 to be the odd man out on the output side because, while most of the outputs go to the character generator UF10 that output goes to UG9.

The static signals on SD0-SD7 aren't so welcome, though.

If possible can you do a scope capture of the signals on UF8 pins 5 and 6, one above the other so we can see them both together and the relationship between them? Ideally we want about 10 to 16 cycles of the pin 5 signal and whatever the pin 6 signal looks like at the same time.

When you've got that can you also do a similar dual capture with UF9 socket pin 11 (Video Latch) on the upper trace, again about 10 to 16 cycles of that, and UF8 pin 5 on the lower trace?

And just to confirm, when you said

..that included the RAM (UF7 and UF8) pin 10s as well?

[ScottishColin]

All - the video signal 'wanders' whilst the UF9 is out. It starts as a checkerboard, but wanders to a completely white screen after 15 seconds or so.

If I press down the empty UF9 socket, it goes back to the checkerboard. Is this a bad connection on the new UF9 socket?

Colin.

[SiriusHardware]

Doesn't this imply that there's a problem in the food chain prior to UF9?

Yes, but unfortunately the video RAMs -are- prior to UF9

To recap:

We can say that from UF9 on, things look OK.

From the point of view of this investigation, the following seems true:

There is apparently no write activity to the video RAM during initialisation, therefore the RAM is not being cleared.

The Video RAM CS pins are tied permanently low

The Video RAM R/W pins appear steady high, so they are in output mode all the time.

There is activity on the address inputs SA0-SA9 of the video RAMs.

Just taking the above, and assuming that the Video RAM is not being initialised and therefore contains random data, we should be seeing constantly changing data on the outputs of the Video RAM, but we are not, we are seeing only steady-state data. This is casting doubt on the health of the video RAMs.

The video data bus buffers UE7 / UE8 could also be imposing this unexpected steady state on the SD0-SD7 lines.

[ScottishColin]

fyi, with UF9 in place, it's now a reverse @ filling the screen...

Colin.

Originally Posted by ajgriff

All this seems to suggest that the video RAMs and character ROM are doing as they're told ie, displaying semicolons or the checkerboard with UF9 removed. Doesn't this imply that there's a problem in the food chain prior to UF9?

Alan

[SiriusHardware]

If I press down the empty UF9 socket, it goes back to the checkerboard

This is just a consequence of the inputs of the character generator not being held in any particular state because nothing is connected to them. Nothing to worry about.

[SiriusHardware]

fyi, with UF9 in place, it's now a reverse @ filling the screen...

That could mean you have lost one of the lines between UF9 and UF10, or possibly between UF7 / UF8 and UF9.

I would look at that again when you have a new UF9 in place, as we suspect the original UF9 is faulty.

[ScottishColin]

I can feel that I may have to work on UF8 and 7.

Does anyone know of an equivalent of the TMM314APL chips that are in my PET - just in case I break them? They also have a 9F marking on them if that's of use.

Colin.

Originally Posted by SiriusHardware

Yes, but unfortunately the video RAMs -are- prior to UF9

To recap:

We can say that from UF9 on, things look OK.

From the point of view of this investigation, the following seems true:

There is apparently no write activity to the video RAM during initialisation, therefore the RAM is not being cleared.

The Video RAM CS pins are tied permanently low

The Video RAM R/W pins appear steady high, so they are in output mode all the time.

There is activity on the address inputs SA0-SA9 of the video RAMs.

Just taking the above, and assuming that the Video RAM is not being initialised and therefore contains random data, we should be seeing constantly changing data on the outputs of the Video RAM, but we are not, we are seeing only steady-state data. This is casting doubt on the health of the video RAMs.

The video data bus buffers UE7 / UE8 could also be imposing this unexpected steady state on the SD0-SD7 lines.

[SiriusHardware]

Taking your second capture first, this appears to show what we would expect, that the SA0 line state is toggling lo-hi-lo-hi for each successive capture by UF9 from the video RAMs UF7 / UF8.

The first trace shows that the SA0 line has shorter pulses and changes state more often than the SA1 line, which is also broadly what I would expect.

With the SA... address lines clearly changing all the time and the video RAMS enabled in output mode all the time, the question is: Why are the data outputs never changing?