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Components and Circuits For discussions about component types, alternatives and availability, circuit configurations and modifications etc. Discussions here should be of a general nature and not about specific sets. |
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12th Oct 2021, 7:55 am | #1 |
Hexode
Join Date: Apr 2017
Location: Buderim, Queensland, Australia.
Posts: 428
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Interesting Vintage TTL Logic IC Problem
Interesting Vintage TTL Logic IC Problem
I was asked to design a circuit to provide a 5 volt pulse train at 3000 and 300 pulses per minute, to “calibrate” a counting device. There was a possible later need for 1500 and 150 ppm, so I factored that in to the design. In a whim of nostalgia, I decided to use vintage TTL, and to meander down familiar paths from the 1970s through to 2000 or so, where, probably like a lot of us, we had many equipments with heaps of TTL on boards. I had lots of maintenance experience to board level, with repair, on Thomson MSSR radar processing equipment, etc, et alia, with hundreds of fully populated dual DIN41612 PCBS. Some 54xxN, but mostly 74xxN, and some 74LSxxN. Never saw a single 76xxN. I had virtually no design experience on TTL per se. But ... Should be easy. What could go wrong? So I used 12 V AC mains plug pack and a 5.1V zener to generate a 5V 50 Hz (3000 cycles per minute) drive signal, one lead at 0V the other 5Vpeak, with a Zs of 1000R or so. Mains frequency was good enough accuracy for this project. I then used a decade counter and divide by 2. Rummage through my Logic IC bins to find some suitable TTL. No 7490N to be seen there, so I had to use a few 74LS90N, a decade counter. Wired up on veroboard, plenty of bypass caps, ICs on sockets, used a tight 5V DC supply. SET and RESET lines to 0V; IC jumpers set to give divide by ten. The 3000 cpm source signal went to the LS90 counter clock input via a 1000R “isolating” resistor. Power up, check DC OK, check counter OP with CRO – zilch. I expected to see a pulse train of period 20mS. Occasionally, the OP went to HIGH, then to LOW, but mostly stayed LOW. Many, many, hours later, I could not fault the circuit. New IC, all possible checks carried out. Photo of project board and roughie circuit attached. CRO photos of input signal and decade counter output attached. Probes are 10x. Vert channels are DC coupled, 2V/cm, bottom trace is LS90 input, top is LS90 output. Photo 3 Horiz is 10mS/cm, SYNC CH1. Second photo is signal source with Horiz at 1mS/cm. I thought the fault was so interesting, that I thought I might post it for veteran TTL users and designers. I was not aware of the problem, for a good reason. I have since fixed the underlying problem, but for fun and your intrigue, I ask for your possible solutions please. A very nice Kewpie doll will be handed to the first person with complete correct (I think) answer, but must be picked up personally from my workshop. I am currently impecuniously disadvantaged and cannot afford postage. I hope that I am not the only person in the TTL world to know of this problem. But have a feeling that I may even learn some more from your answers. No clues yet. Probably easy for experts. Good luck. |
12th Oct 2021, 9:38 am | #2 |
Pentode
Join Date: Oct 2016
Location: Maldon, Essex, UK.
Posts: 184
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Re: Interesting Vintage TTL Logic IC Problem
I assume that the decoupling capacitors are hidden on the back of the Veroboard.
I think that a fast edge, such as produced by SN74LS14 inverters with Schmitt-Trigger inputs, is needed to ensure that the flip-flops in the decade counter are clocked simultaneously, especially with the input applied to CKB to get a symmetrical output at QA. I would have used a lower voltage Zener diode to ensure that the input voltage cannot exceed the supply voltage. David |
12th Oct 2021, 9:39 am | #3 |
Octode
Join Date: Jul 2009
Location: Carmel, Llannerchymedd, Anglesey, UK.
Posts: 1,509
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Re: Interesting Vintage TTL Logic IC Problem
Without diving in too far, I would have started with a schmidt gate on the input - e.g. 7413. TTL can become a bit touchy when presented with slow changes. Does the input go close enough to 0V just using that zener?
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12th Oct 2021, 10:20 am | #4 |
Hexode
Join Date: Apr 2017
Location: Buderim, Queensland, Australia.
Posts: 428
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Re: Interesting Vintage TTL Logic IC Problem
Yes, caps on board rear.
If I posted a photo of the rear of the PCB, most readers would need a sedative and a good lie down. |
12th Oct 2021, 10:39 am | #5 |
Octode
Join Date: Sep 2004
Location: St. Albans, Hertfordshire, UK.
Posts: 1,478
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Re: Interesting Vintage TTL Logic IC Problem
I think that 10K input resistor is too big. It could prevent the input going to a logic"0".
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12th Oct 2021, 10:44 am | #6 |
Hexode
Join Date: Apr 2017
Location: Buderim, Queensland, Australia.
Posts: 428
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Re: Interesting Vintage TTL Logic IC Problem
There's a nice little cafe upstairs in Waterstones St Albans.
Great to peruse radio books. The resistor is just a holdown, "just in cases". Shouldnt affect anything? |
12th Oct 2021, 10:50 am | #7 |
Dekatron
Join Date: Sep 2005
Location: Seaford, East Sussex, UK.
Posts: 5,997
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Re: Interesting Vintage TTL Logic IC Problem
The sink current for CKB is -3.2mA and low voltage is 0.4V. You really need a transistor buffer with pull-up resistor to drive this.
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12th Oct 2021, 10:56 am | #8 | |
Hexode
Join Date: Apr 2017
Location: Buderim, Queensland, Australia.
Posts: 428
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Re: Interesting Vintage TTL Logic IC Problem
Quote:
It had 1000R emitter resistor, no collector resistor, 5V supply, DC coupled to clock input. |
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12th Oct 2021, 11:08 am | #9 |
Nonode
Join Date: Oct 2008
Location: Warsaw, Poland and Cambridge, UK
Posts: 2,681
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Re: Interesting Vintage TTL Logic IC Problem
Those slow edges aren't going to help. I'd be very uncomfortable driving the counter's clock input from them without a Schmitt trigger to add some hysteresis and sharpen up the edges.
Chris
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12th Oct 2021, 12:03 pm | #10 |
Heptode
Join Date: Feb 2006
Location: Marlborough, Wiltshire, UK.
Posts: 917
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Re: Interesting Vintage TTL Logic IC Problem
Besides a Schmitt trigger, you will likely need a low pass filter to get rid of mains transients. My ttl based clock from 1972, ran quite fast without this !
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12th Oct 2021, 1:00 pm | #11 |
Dekatron
Join Date: Dec 2007
Location: Haarlem, Netherlands
Posts: 4,203
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Re: Interesting Vintage TTL Logic IC Problem
Also, the 12VAC ground path could be dubious, dependent on how and if the supply voltage is derived from it.
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12th Oct 2021, 1:10 pm | #12 |
Nonode
Join Date: Jun 2016
Location: Bognor Regis, West Sussex, UK.
Posts: 2,301
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Re: Interesting Vintage TTL Logic IC Problem
As Maarten suggests if the ac input providing the trigger is the same as the ac used to generate the +5v supply it depends on how you derive the +5 from the supply.
If you used a bridge rectifier then you will not have a reliable 0V reference for the trigger. Half wave rectification would actually be better and short out the 1K resistor to the 0v. Better yet a separate supply and make sure that one side of the ac used for trigger is connected to the psu 0V Peter |
12th Oct 2021, 1:37 pm | #13 |
Nonode
Join Date: Aug 2007
Location: Walsall Wood, Aldridge, Walsall, UK.
Posts: 2,874
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Re: Interesting Vintage TTL Logic IC Problem
Hi!
Where 50 Hz or 100 Hz pulses are need from a mains rectifier, a popular method, often found in phase control circuitry, is to insert a single diode between the (+) output of the rectifier and the reservoir capacitor, anode to rectifier and cathode to reservoir capacitor, with the half–wave or full–wave pulses from the anode of the auxiliary added diocde. If a full–wave or bridge system is in use as the L.T. supply rectifier, an additional ÷2 flip–flop or counter section is needed between the mains–pulses and the input to the seconds/minutes counter chain, because the mains counting pulses are 100 Hz full–wave! When I did a TTL digital clock project in my student days the method recommended to me to count the mains was to square/differentiate the mains pulses and feed it to a 555 monostable with a time delay of about 15 ms to produce output pulses every 20 ms to feed the first ÷50 divider chain to give a 1 sec count! Chris Williams
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It's an enigma, that's what it is! This thing's not fixed because it doesn't want to be fixed! Last edited by Chris55000; 12th Oct 2021 at 2:06 pm. |
12th Oct 2021, 2:25 pm | #14 |
Heptode
Join Date: Oct 2011
Location: Culcheth, Cheshire, UK.
Posts: 654
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Re: Interesting Vintage TTL Logic IC Problem
This is the circuit I used. It went into a PIC microcontroller, but as I was only reading 1 bit it had no problems with 'sloping' edges.
The 7490 types internally have the one 'clk' input connected to 3 or 4 flip-flops, so I don't know how they would switch with 'sloping' inputs, but I would aim for the 5 nS rise and fall times that are used in the datasheet diagrams. |
12th Oct 2021, 3:01 pm | #15 |
Octode
Join Date: Jan 2003
Location: Ware, Herts. UK.
Posts: 1,082
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Re: Interesting Vintage TTL Logic IC Problem
All of the PICs I've used have Schmitt trigger digital inputs, so that would be an advantage for Buzby123's application.
PIC Schmitt trigger inputs caused problems with a number of designs I worked on a few day jobs ago, but that's another story. John |
12th Oct 2021, 5:21 pm | #16 | ||
Dekatron
Join Date: Sep 2005
Location: Seaford, East Sussex, UK.
Posts: 5,997
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Re: Interesting Vintage TTL Logic IC Problem
Quote:
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12th Oct 2021, 8:28 pm | #17 |
Heptode
Join Date: Dec 2011
Location: Mayabeque, Cuba
Posts: 617
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Re: Interesting Vintage TTL Logic IC Problem
This circuit has never failed to me. I have used it a lot of times from the 60Hz mains with very good results. On other ocassions I have even used an optocoupler to generate the pulses. The circuit also works for CMOS chips.
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12th Oct 2021, 11:49 pm | #18 |
Hexode
Join Date: Apr 2017
Location: Buderim, Queensland, Australia.
Posts: 428
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Re: Interesting Vintage TTL Logic IC Problem
The +5V DC supply is completely isolated from the clock source.
The trial emitter follower was mostly to do with clamping the clock LOW state more towards 0V. |
13th Oct 2021, 11:29 pm | #19 |
Hexode
Join Date: Apr 2017
Location: Buderim, Queensland, Australia.
Posts: 428
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Re: Interesting Vintage TTL Logic IC Problem
Solution.
When all else fails, get the manual out. I looked for clues in 74LS90N datasheets. In only one (Motorola) of many, I found this tiny footnote “tr<100nS” (“tsubscript r<100nS). Pennies falling. My clock risetime was many times this. Severe and ongoing embarrassment. Basic. Old age. Solution, use a 74LS14 Schmitt to give edge and buffer action. I also forgot the old TTL rule, “buffer in, buffer out”, so the other LS14 sections now buffer all outputs. Several forum members were straight onto this risetime and falltime issue, notably “Neutrino, lesmw0sec, and cmjones01”. Good comments from all. Thank you. I have cut up the Kewpie Doll into six sections, wrapped all, awaiting personal collection. |
14th Oct 2021, 9:31 am | #20 |
Octode
Join Date: Jul 2009
Location: Carmel, Llannerchymedd, Anglesey, UK.
Posts: 1,509
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Re: Interesting Vintage TTL Logic IC Problem
Thanks for the mention - I'll pass on the doll! I recall when 7490s became available. We were amazed that a bit of plastic could divide by 10 - it certainly beat a card full of bistable transistor circuits!
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