Sharp MZ-80K help needed on repair

[SiriusHardware]

Thanks for the code, I will have a go at disassembling it as far as the 8255 initialisation sequence later on.

For the sockets you will obviously need two for the ICs and another two to use as plug-in carriers for the NOP test resistors - they will be fitted instead of IC36 and IC37.

Let's see if the replacement buffers miraculously fix your fault - no harm in being optimistic - and if not, I will do a little sketch showing what the plug-ins should look like.

[SiriusHardware]

I've had a first look at the code in the RAM TEST EPROM.

The first thing I notice is that there are no instances of IN and OUT instructions, suggesting that all of the hardware including the large peripheral ICs are memory mapped, that is, the system writes to them and reads from them by using instructions which are normally used to write to or read from memory. The IORQ signal, although buffered by IC35, does not appear to go anywhere after that other than to the bus expansion connector.

This is useful for us as it means that the simple NOP test, if we get that far, will exercise the chip select signals for the peripheral ICs as well as the memory ICs.

My reading of the workings of the main address decoder IC47 (output intervals of 1000 Hex) and the sub-address decoder IC30 for the peripheral ICs (output steps at 00, 04, 08, 0C etc) puts the 8255 at addresses E000-E003, the 8253 at E004-E007 and the sound hardware, although I don't quite understand that bit yet, at E008-E00B.

The initial part of the code:

-Disables interrupts

-Places the stack at 0xE000

-Block shifts a large amount of structured-looking data from 0x01A3-onwards into the screen RAM. I believe this is 'drawing' the background 'framework' for the RAM TEST screen display.

-Polls address 0xE002, which is likely to be the 8255 PORT C register, and waits until PORT C bit 7 (=V-BLANK) is detected to be low, before carrying on.

As expected, the code does not try to use system memory for storing variables or for stack operations / subroutine calls - all writes to and reads from system RAM are for the purposes of testing the RAM only.

[SiriusHardware]

Just to expand on one point above, notice the code just goes right ahead and tries to read the state of V-BLANK through portC bit 7 without first setting up the 8255. It can do this because after reset, the 8255 initialises with all three ports set up as 8-bit inputs, so the IC requires no specific setup if you just want all the port pins to be inputs.

Although the code does make use of the V-BLANK signal for sync / timing purposes just as pudwink's source said it does, it doesn't make any attempt to change the port pin connected to V-GATE to an output, nor does it ever try to drive V-GATE - so we shouldn't worry too much about what V-GATE looks like with the RAM TEST EPROM fitted in the machine.

Mark did suggest looking at the V-GATE signal with the MROM fitted and we can come back to that once we get the system running code from ROM reliably, although hopefully, if we get that far, the machine will spring to life anyway.

I disassembled all of the code portion of the RAM TEST code last night - most of the code in the EPROM appears to be an image of the program's 'display panel' which is copied into the screen RAM very early on - I commented some of the code before waking up with the keyboard stuck to my face. I'll post what I have this evening.

[pudwink]

Hi
Now the new ICs came today but the guy sent the wrong ones I ordered SN74LS241N and he sent SN74ALS241N he says they are 99% the same thing so I have tried hem anyway and still the same corrupt screen.

[SiriusHardware]

OK, that rules those out although in the long term I would look around for 74LS241s as originally fitted. Not a complete bust as we now know those buffers aren't the problem, and having them in sockets allows us to replace them with a simple NOP simulator. I'll put together a sketch a bit later.

[SiriusHardware]

Here's the recipe:-

2 x 20 pin sockets

8 x resistors, wattage unimportant but ideally small ones like 1/8th (0.125) watt, value around 220 ohms give or take a bit

Take one socket and four resistors and insert one end of a resistor into socket pins 18, 16, 14, and 12. Join the other ends of the resistors together and connect them with a single piece of solid core wire to socket pin 10. (see sketch). How you physically organise this is up to you, you can either just push the resistors and common wire into the sockets or you can add a spot of solder to each one to make sure the resistors and wire stay put and stay connected. See the attached sketch.

Do the same with the other socket and when you're happy with them, remove the newly fitted IC36 and IC37 and plug these socket / resistor assemblies into the sockets normally occupied by IC36 and IC37. Obviously, pin 1 of the socket needs to go to pin 1 of the socket you are plugging it into.

With those fitted, turn on the machine, you should see a screen full of random characters - this is because the Z80 currrently can not send data to anywhere, including the screen memory.

Use your scope to look at the A0 line (pin 30) of the Z80. If the NOP rig is working you should see a steady square waveform on there and also on pins 31, 32, 33, 34, 35, 36, 37. As you step upwards from one pin to the next the pulses on each line should be twice as long as they were on the previous one. You can also use your logic probe to look at the same pins. Let us know if that works.

[pudwink]

Hi
That's brilliant will try it tomorrow as have to be up at 2am for work with the resistors I have some 1/4 watt 270R ones do you think these will be ok.

[Timbucus]

They will be fine the 1/8 watt was just for size and 270 will hold the lines fine I am sure.

[SiriusHardware]

As Tim says, 270R at 1/4 watt will be fine.

[SiriusHardware]

As promised, a disassembly of the RAM TEST code so we can see what it is supposed to be doing. Virtually the first thing it does - or should do - is to draw the 'Front Panel' of the utility. As we know, that only happens very occasionally.

Apologies in advance for any mitsakes.

0000 f3         di		;Disable interrupts

0001 31 00 e0   ld sp,0xe000	;Place Stack Pointer at E000

;    Initialise the RAM TEST 'Front Panel' 

0004 21 a3 01   ld hl,0x01a3	;HL points to MEM TEST front panel graphics
0007 11 00 d0   ld de,0xd000	;DE points to start of screen RAM
000a 01 e8 03   ld bc,0x03e8	;Number of bytes to shift to screen RAM
000d ed b0      ldir		;Block copy BC bytes from (HL) to (DE)

;    Clear first screen memory location (0x20 = 'Space'). This location
;    seems to be used as a progress indicator.

000f 21 00 d0   ld hl,0xd000
0012 36 20      ld (hl),0x20

;    Wait for Vertical Blank pulse before continuing

0014 21 02 e0   ld hl,0xe002	;HL points to portC in 8255
0017 3e 7f      ld a,0x7f	;bit mask = 01111111
0019 be         cp (hl)		;Compare portC inputs with value in A	
001a da 19 00   jp c,0x0019	;If V-BLANK not low, look again,  -> 0019

;    Indicate progress

001d 21 00 d0   ld hl,0xd000
0020 34         inc (hl)	

;    Write and read back various values to / from the address being tested

0021 21 00 10   ld hl,0x1000	;HL points to start of system RAM

0024 36 00      ld (hl),0x00	;Test location with value 0x00		
0026 7e         ld a,(hl)
0027 ee 00      xor 0x00
0029 b1         or c
002a 4f         ld c,a
002b 36 55      ld (hl),0x55	;Test location with value 0x55
002d 7e         ld a,(hl)
002e ee 55      xor 0x55
0030 b1         or c
0031 4f         ld c,a
0032 36 aa      ld (hl),0xaa	;Test location with value 0xAA
0034 7e         ld a,(hl)
0035 ee aa      xor 0xaa
0037 b1         or c
0038 4f         ld c,a
0039 36 ff      ld (hl),0xff	;Test location with value 0xFF
003b 7e         ld a,(hl)
003c ee ff      xor 0xff
003e b1         or c
003f 4f         ld c,a

;    Advance to the next memory location by increasing L by 1
;    If L <= 0xFF, test the next memory location (-> 0024)

0040 2c         inc l
0041 20 e1      jr nz,0x0024

;    Otherwise, increment H to advance to the next 256-byte block
;    Check that we have not reached the end of this RAM block
;    (4FFF). If H < 0x50, test the next memory location (-> 0024) 

0043 24         inc h
0044 3e 50      ld a,0x50
0046 bc         cp h
0047 20 db      jr nz,0x0024

;    Display the results of the RAM block test

0049 11 6d 47   ld de,0x476d
004c cb 41      bit 0,c
004e 21 72 d0   ld hl,0xd072
0051 7a         ld a,d
0052 28 01      jr z,0x0055
0054 7b         ld a,e
0055 77         ld (hl),a
0056 cb 49      bit 1,c
0058 21 ea d0   ld hl,0xd0ea
005b 7a         ld a,d
005c 28 01      jr z,0x005f
005e 7b         ld a,e
005f 77         ld (hl),a
0060 cb 51      bit 2,c
0062 21 62 d1   ld hl,0xd162
0065 7a         ld a,d
0066 28 01      jr z,0x0069
0068 7b         ld a,e
0069 77         ld (hl),a
006a cb 59      bit 3,c
006c 21 da d1   ld hl,0xd1da
006f 7a         ld a,d
0070 28 01      jr z,0x0073
0072 7b         ld a,e
0073 77         ld (hl),a
0074 cb 61      bit 4,c
0076 06 c1      ld b,0xc1
0078 21 52 d2   ld hl,0xd252
007b 7a         ld a,d
007c 28 01      jr z,0x007f
007e 7b         ld a,e
007f 77         ld (hl),a
0080 cb 69      bit 5,c
0082 21 ca d2   ld hl,0xd2ca
0085 7a         ld a,d
0086 28 01      jr z,0x0089
0088 7b         ld a,e
0089 77         ld (hl),a
008a cb 71      bit 6,c
008c 21 42 d3   ld hl,0xd342
008f 7a         ld a,d
0090 28 01      jr z,0x0093
0092 7b         ld a,e
0093 77         ld (hl),a
0094 cb 79      bit 7,c
0096 21 ba d3   ld hl,0xd3ba
0099 7a         ld a,d
009a 28 01      jr z,0x009d
009c 7b         ld a,e
009d 77         ld (hl),a

;       Indicate further progress
009e 21 00 d0   ld hl,0xd000
00a1 34         inc (hl)

;    Now test the next block (5000-9FFF)

00a2 21 00 50   ld hl,0x5000
00a5 36 00      ld (hl),0x00
00a7 7e         ld a,(hl)
00a8 ee 00      xor 0x00
00aa b1         or c
00ab 4f         ld c,a
00ac 36 55      ld (hl),0x55
00ae 7e         ld a,(hl)
00af ee 55      xor 0x55
00b1 b1         or c
00b2 4f         ld c,a
00b3 36 aa      ld (hl),0xaa
00b5 7e         ld a,(hl)
00b6 ee aa      xor 0xaa
00b8 b1         or c
00b9 4f         ld c,a
00ba 36 ff      ld (hl),0xff
00bc 7e         ld a,(hl)
00bd ee ff      xor 0xff
00bf b1         or c
00c0 4f         ld c,a
00c1 2c         inc l
00c2 20 e1      jr nz,0x00a5
00c4 24         inc h
00c5 3e a0      ld a,0xa0
00c7 bc         cp h
00c8 20 db      jr nz,0x00a5

;    Display the results of that test

00ca 11 6d 47   ld de,0x476d
00cd cb 41      bit 0,c
00cf 21 67 d0   ld hl,0xd067
00d2 7a         ld a,d
00d3 28 01      jr z,0x00d6
00d5 7b         ld a,e
00d6 77         ld (hl),a
00d7 cb 49      bit 1,c
00d9 21 df d0   ld hl,0xd0df
00dc 7a         ld a,d
00dd 28 01      jr z,0x00e0
00df 7b         ld a,e
00e0 77         ld (hl),a
00e1 cb 51      bit 2,c
00e3 21 57 d1   ld hl,0xd157
00e6 7a         ld a,d
00e7 28 01      jr z,0x00ea
00e9 7b         ld a,e
00ea 77         ld (hl),a
00eb cb 59      bit 3,c
00ed 21 cf d1   ld hl,0xd1cf
00f0 7a         ld a,d
00f1 28 01      jr z,0x00f4
00f3 7b         ld a,e
00f4 77         ld (hl),a
00f5 cb 61      bit 4,c
00f7 06 c1      ld b,0xc1
00f9 21 47 d2   ld hl,0xd247
00fc 7a         ld a,d
00fd 28 01      jr z,0x0100
00ff 7b         ld a,e
0100 77         ld (hl),a
0101 cb 69      bit 5,c
0103 21 bf d2   ld hl,0xd2bf
0106 7a         ld a,d
0107 28 01      jr z,0x010a
0109 7b         ld a,e
010a 77         ld (hl),a
010b cb 71      bit 6,c
010d 21 37 d3   ld hl,0xd337
0110 7a         ld a,d
0111 28 01      jr z,0x0114
0113 7b         ld a,e
0114 77         ld (hl),a
0115 cb 79      bit 7,c
0117 21 af d3   ld hl,0xd3af
011a 7a         ld a,d
011b 28 01      jr z,0x011e
011d 7b         ld a,e
011e 77         ld (hl),a

;    Indicate further progress
011f 21 00 d0   ld hl,0xd000
0122 34         inc (hl)

;    Test the next block (0xA000 -0xCFFF)

0123 21 00 a0   ld hl,0xa000
0126 36 00      ld (hl),0x00
0128 7e         ld a,(hl)
0129 ee 00      xor 0x00
012b b1         or c
012c 4f         ld c,a
012d 36 55      ld (hl),0x55
012f 7e         ld a,(hl)
0130 ee 55      xor 0x55
0132 b1         or c
0133 4f         ld c,a
0134 36 aa      ld (hl),0xaa
0136 7e         ld a,(hl)
0137 ee aa      xor 0xaa
0139 b1         or c
013a 4f         ld c,a
013b 36 ff      ld (hl),0xff
013d 7e         ld a,(hl)
013e ee ff      xor 0xff
0140 b1         or c
0141 4f         ld c,a
0142 2c         inc l
0143 20 e1      jr nz,0x0126
0145 24         inc h
0146 3e d0      ld a,0xd0
0148 bc         cp h
0149 20 db      jr nz,0x0126

;    Display the results

014b 11 6d 47   ld de,0x476d
014e cb 41      bit 0,c
0150 21 5b d0   ld hl,0xd05b
0153 7a         ld a,d
0154 28 01      jr z,0x0157
0156 7b         ld a,e
0157 77         ld (hl),a
0158 cb 49      bit 1,c
015a 21 d3 d0   ld hl,0xd0d3
015d 7a         ld a,d
015e 28 01      jr z,0x0161
0160 7b         ld a,e
0161 77         ld (hl),a
0162 cb 51      bit 2,c
0164 21 4b d1   ld hl,0xd14b
0167 7a         ld a,d
0168 28 01      jr z,0x016b
016a 7b         ld a,e
016b 77         ld (hl),a
016c cb 59      bit 3,c
016e 21 c3 d1   ld hl,0xd1c3
0171 7a         ld a,d
0172 28 01      jr z,0x0175
0174 7b         ld a,e
0175 77         ld (hl),a
0176 cb 61      bit 4,c
0178 06 c1      ld b,0xc1
017a 21 3b d2   ld hl,0xd23b
017d 7a         ld a,d
017e 28 01      jr z,0x0181
0180 7b         ld a,e
0181 77         ld (hl),a
0182 cb 69      bit 5,c
0184 21 b3 d2   ld hl,0xd2b3
0187 7a         ld a,d
0188 28 01      jr z,0x018b
018a 7b         ld a,e
018b 77         ld (hl),a
018c cb 71      bit 6,c
018e 21 2b d3   ld hl,0xd32b
0191 7a         ld a,d
0192 28 01      jr z,0x0195
0194 7b         ld a,e
0195 77         ld (hl),a
0196 cb 79      bit 7,c
0198 21 a3 d3   ld hl,0xd3a3
019b 7a         ld a,d
019c 28 01      jr z,0x019f
019e 7b         ld a,e
019f 77         ld (hl),a

;    And go back to the start
;    The test runs continuously?

01a0 c3 0f 00   jp 0x000f

;    01A3 onwards = data, probably the
;    'Front Panel' for the RAM
;    TEST screen display.

[Mark1960]

Remember that as the 8255 output is not being initialised the display might remain blank. The ram checker code is relying on the ls ttl input floating high, it might work in most cases but it was only reaching 1v on pudwinks system. A 4k7 pull up resistor should solve this and won’t cause a problem if not removed later.

[SiriusHardware]

Looking at the relevant section of the diagram (Video Generator: Manual page 32: PDF page 34) The video bitstream is coming out of IC29 pin into IC17 pin 10.

The job of IC17 (Pins 1,2,13,12) is to act as a gate which either allows the video to pass through from pin 2 to its output on pin 12 or does not, depending on the states of V-Gate, V-Blank and H-Blank.

When all of those signals are high, video is allowed to pass through IC17 from pin 2 to pin 12, but if any of those signals are low, then video does not pass through to pin 12. A low state on any one of those three signals including V-Gate blanks the video output.

I agree with Mark that V-Gate had better have a decent 'High' on it for the RAM TEST code to work because the RAM TEST code does not turn the 8255 pin 14 into an output and drive it high. It probably should.

Therefore, as Mark says, you can remove one possible area of uncertainty by fitting a 4K7 resistor between IC24 pin 1 and IC24 pin 14 to make sure that IC24 pin 1 is always high unless it is intentionally driven low by the 8255.

There is a chance that IC24 pin 1 (an input) is actually faulty and should in fact be floating much higher than the 1V apparently being measured on it. Should we have pudwink replace it and see what the voltage on pin 1 comes up to then? Don't all (working) TTL inputs have internal pullup resistors?

[pudwink]

Done the NOP test on the Z80 these are the results.

[pudwink]

I think it looks right

[SiriusHardware]

Nice, that looks like it is working and you've obviously got the hang of tweaking the Time / Div control as you step through the pins so you can always see several pulses on the screen. It's nice the way that scope shows the V/Div and Time / Div settings on the screen itself.

From Pin 38, carry on through the Z80 pins 39, 40, 1, 2, 3, 4, 5, you should see more of the same with the waveforms changing ever more slowly. No need to take photos now that you know what you are looking for, just make sure all of those pins are flipping high and low at an even rate.

Could you also put a 4K7 from IC24 pin 1 to +5V (IC24 pin 14) as Mark suggested - this is to ensure the correct operation of the RAM TEST code which does not appear to drive V-Gate properly. It can be removed later when the system is eventually working, because the code in MROM will drive the V-Gate signal properly.

One thing I do notice is that your pin 38 trace doesn't appear to have gaps on the bottom edge like all the others, I don't know if this is perhaps because the other trace was turned on when that shot was taken.

[pudwink]

I have done the scope tests on the other pins of the Z80 and they look ok I have today replaced IC24 but still showing 1v on pin 14 I have not got any 4K7 resistors so will have to source some.

[pudwink]

Dont know if its anything or just the resistors connected to the 0v but getting a pulsing through the picture.
https://www.youtube.com/watch?v=0bXXtlI_ZpA

[SiriusHardware]

OK - that odd low voltage on the input of IC24 pin 1 certainly is a mystery. Let's see if we can lift it up a bit. The resistor doesn't have to be 4K7 exactly, up or down a bit in value will do. (2K2, 2K7, 3K3, 5K6, 6K8, etc).

Your next job is to look at A0 to A15 (as you have been doing) but this time on the other side of the address buffer ICs, IC44 and IC45.

Look at

IC44 pins 14, 16, 18, 3, 5, 7, 12, 9

and

IC45 pins 14, 16, 18, 3, 5, 7, 12, 9

These should look the same as the A0 to A15 pins did on the Z80 - a very fast changing waveform on IC44 pin 14 (Buffered A0), working your way through all the buffered address pins to a slow changing waveform on IC45 pin 9 (Buffered A15).

[SiriusHardware]

Ref: The disturbance on the picture, can you scope IC 35 (74LS244) pins 7, 5 and 14 and show what you see on those?

7 should be mainly high with short low pulses
5 should be staying high
14 should be mainly high with short low pulses

[SiriusHardware]

Also, try removing all of the system RAM from its sockets and setting it to one side. Do you still get that disturbance on the display?