MK14 Rev VI PCBs - Page 5 - UK Vintage Radio Repair and Restoration Discussion Forum

Slothie · 19th Nov 2022, 3:08 pm

Quote:

Originally Posted by ortek_service

Or, as a PIA is relatively simple, use a CPLD/FPGA to implement one - Maybe using a cheap Lattice device (And might find one with enough cells to give the 128Byte RAM as well, Without resorting to now mostly much larger & expensive Alteras & Xilinx devices )

I did think about this a few years ago when I was playing with CPLD's but the big problem is getting ones that do 5v logic. Most work at 3.3v max and to properly replace a 8154 you'd really want 5v outputs and 5v (tolerant) inputs.
I was looking at the idea of a PIC18F series uC since they can be clocked faster than the older 16F series, thus better suited to meeting the timing requirements, but the project is still hovering in the middle of my "TODO" list!

ortek_service · 19th Nov 2022, 3:23 pm

Yes, there doesn't seem to be many (/ any?) CPLD's / FPGA's available these days that allow their Vio to be higher than 3.3V. Although there are lots of small level-converter IC's (maybe too small, with many in CSP/BGA), but does mean extra circuitry (Inc. regulator for even lower Vcore of the FPGA).

Probably wouldn't need much o/p drive, as I don't think the 8154 had too much
- Although I think some manufacturers cut-corners and exceeded spec of these when directly driving one-side of multiplexed LED displays.

AVR uC's can be ran at 5V, so sometimes makes Arduino preferable to RPi's and using Pico would no doubt require level-conversion.
Plus some SiLabs Enhanced-8051 uC's had 5V I/O and built-in Regulator for core voltage, which made them convenient for retrospectively adding into 5V systems whilst providing a lot of capability in a small device.

Slothie · 30th Nov 2022, 4:27 pm

DavidMS pointed out a slight typo in Appendix A where I describe the new SCIOS as having the '----- --' prompt rather than the correct '0000 00' prompt. I have corrected the document here.

Buzby123 · 30th Nov 2022, 4:35 pm

Quote:

Originally Posted by Slothie

I have corrected the document here.

Are you sure you uploaded the correct file ?.

Slothie · 30th Nov 2022, 5:21 pm

Quote:

Originally Posted by Buzby123

Quote:

Originally Posted by Slothie

I have corrected the document here.

Are you sure you uploaded the correct file ?.

I'm sure I uploaded the wrong file!

19th Nov 2022, 3:23 pm	#82
ortek_service Octode Join Date: May 2018 Location: Northampton, Northamptonshire, UK. Posts: 1,440	Re: MK14 Rev VI PCBs Yes, there doesn't seem to be many (/ any?) CPLD's / FPGA's available these days that allow their Vio to be higher than 3.3V. Although there are lots of small level-converter IC's (maybe too small, with many in CSP/BGA), but does mean extra circuitry (Inc. regulator for even lower Vcore of the FPGA). Probably wouldn't need much o/p drive, as I don't think the 8154 had too much - Although I think some manufacturers cut-corners and exceeded spec of these when directly driving one-side of multiplexed LED displays. AVR uC's can be ran at 5V, so sometimes makes Arduino preferable to RPi's and using Pico would no doubt require level-conversion. Plus some SiLabs Enhanced-8051 uC's had 5V I/O and built-in Regulator for core voltage, which made them convenient for retrospectively adding into 5V systems whilst providing a lot of capability in a small device.