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Old 28th Oct 2020, 11:43 pm   #61
SiriusHardware
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Default Re: MK14 memory upgrade

Write a loop of code (resident in known good RAM) which continually either reads from or writes to an address somewhere in the range 0200-07FF, run it and scope the _CE pin to see if your address decoder is working. If it is you should see a continuous string of narrow low pulses on _CE.

If your code loop is 'writing' you should also see narrow low pulses on _WE but not on _OE, and if your code is 'reading' you should see narrow low pulses on _OE but not on _WE

You can do the same thing in a more primitive way by navigating to 0x0200 in the monitor, putting your scope on the _CS output from the address decoder and stepping through successive addresses on the range 0200-07FF with MEM, there should be one narrow low pulse on _CE per step, and similar, narrow low pulses on _OE, although they might both be very narrow and difficult to see. Analogue scopes work better on continuous, repetitive signals than on single events.
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Old 28th Oct 2020, 11:49 pm   #62
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Default Re: MK14 memory upgrade

Ah thanks - I swapped the chip as maybe it was faulty as it was untested in a tube - now I have random data in both nibbles being read but, still no ability to write. This is now a HM not CY - I tested the CY one in my Z80SBC and it seems fine there.

Annoying when two chip circuits don't work.
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Old 28th Oct 2020, 11:51 pm   #63
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Default Re: MK14 memory upgrade

Quote:
Originally Posted by SiriusHardware View Post
Write a loop of code (resident in known good RAM) which continually either reads from or writes to an address somewhere in the range 0200-07FF, run it and scope the _CE pin to see if your address decoder is working. If it is you should see a continuous string of narrow low pulses on _CE.

If your code loop is 'writing' you should also see narrow low pulses on _WE but not on _OE, and if your code is 'reading' you should see narrow low pulses on _OE but not on _WE

You can do the same thing in a more primitive way by navigating to 0x0200 in the monitor, putting your scope on the _CS output from the address decoder and stepping through successive addresses on the range 0200-07FF with MEM, there should be one narrow low pulse on _CE per step, and similar, narrow low pulses on _OE, although they might both be very narrow and difficult to see. Analogue scopes work better on continuous, repetitive signals than on single events.
I will try the code loop idea - I was doing the step thing in SCIOS and could see a very brief low pulse on _CE - this may be a job for me new posh 100Mhz storage scope - did I mention I had one on the way
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Old 28th Oct 2020, 11:58 pm   #64
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Default Re: MK14 memory upgrade

I wonder if my old 7402 is perhaps too slow as well - I am determined to find a use for the handful of old ones I have - of course thinking about it the 62256 is CMOS so probably needs some pullups... maybe if I plug in my VDU it will start to work...

EDIT: Na cos only _CS comes from the 7402. But the VDU does actually work while plugged in on the end - so that is a good start
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Old 29th Oct 2020, 12:10 am   #65
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Default Re: MK14 memory upgrade

Actually I think the 'plain' 74 series are often faster than some later series. I had a specific case of an Atari mono monitor which had a TTL gate IC in its video-input circuit. They had a reputation for really crisp pictures but this one had a very blurry picture until I replaced the 74LS IC which someone had put in at some point with a plain 74... as specified in the diagram.

The main reason to NOT use plain 74... series is their high(ish) power consumption compared to the later series ICs.
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Old 29th Oct 2020, 12:19 am   #66
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Default Re: MK14 memory upgrade

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Originally Posted by SiriusHardware View Post
Actually I think the 'plain' 74 series are often faster than some later series. I had a specific case of an Atari mono monitor which had a TTL gate IC in its video-input circuit. They had a reputation for really crisp pictures but this one had a very blurry picture until I replaced the 74LS IC which someone had put in at some point with a plain 74... as specified in the diagram.

The main reason to NOT use plain 74... series is their high(ish) power consumption compared to the later series ICs.
Interesting I never twigged that on speed - I burn my fingers on the heatsink every time I use the MK14 so what is a few more mA! I might think again if it was a whole board full.

Thanks for all the suggestions guys a 4.7K pullup on _CS did not help in case you were wondering but, as I can read real data from this chip it is not really likely to be the issue - I might retry the CY version with a pullup in case it explains that not working - gives me something to learn the new scope on anyway.

Edit: Just the write issue to look for then - I have assumed the data read is real.
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Old 29th Oct 2020, 12:23 am   #67
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Default Re: MK14 memory upgrade

Off topic I used to love my Atari Mono monitor it was amazing - when I first joined my employer my Atari ST and its Mono monitor were in use to write documents for a while until we got the computing sorted.
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Old 29th Oct 2020, 12:45 am   #68
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Default Re: MK14 memory upgrade

Still have my original SM124 (and its companion Atari 1040) here within reach. Mainly used for MIDI related stuff now, but that, as we know, is another tale.

However one thing I was interested in looking at was to see whether it would be possible to run OrtonView at a higher frequency to produce a 72Hz frame rate and connect it to the SM124. I haven't yet proved that the MK14 and VDU can successfully run with different-frequency clocks. The video and sync inputs to the SM124 are TTL-level but the necessity for separate vsync and hsync could be a problem with every pin on the PIC already serving some purpose.

Any timing and signal output alterations which made it work with an Atari mono monitor would probably also allow it to drive a VGA monitor (with R, G, B inputs connected together to produce a monochrome image).
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Old 29th Oct 2020, 7:19 pm   #69
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Default Re: MK14 memory upgrade

I'm sure I still have a few more of the Elecap 6116 ICs, of which one already works successfully in my version of Sothie's upgrade. These were originally new-old-stock in tubes which nearly got thrown out from work because we had not made the product they were used in for some time. Needless to say I intercepted them, not least because we occasionally still get examples of that product back for repair.

I can whizz you a couple down if you continue to have problems getting a 62256 to work.
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Old 29th Oct 2020, 8:11 pm   #70
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Default Re: MK14 memory upgrade

Thanks for the offer I will see how I get on - the forum will provide, all hail the forum.
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Old 4th Nov 2020, 10:23 pm   #71
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Default Re: MK14 memory upgrade

Something I thought I had posted last night but, seems not to be here - I had actually ordered some 6116 before the offer was made and they turned up. So having put them in the Memory expansion and rewired it from the 62256 which I could not get to work - I could not get it to work in fact the MK14 stayed with a blank screen. Tested the 6116 on my TL866 and it was fine.

Anyway remembered the bit about NWDS / NRDS reversal so went to check and unplugged NRDS and the MK14 was on and sprang to life. I can read and write memory fine and in fact loaded PicoBASIC which needs the full 1.5K and it worked fine.

Added the OrtonView and that worked as well although it was a little late to try displaying the new memory.

So I ask what the hell is going on and why does it work fine leaving NWDS disconnected from Pin 20 /OE - and that pin floating of course.
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Old 4th Nov 2020, 11:10 pm   #72
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Default Re: MK14 memory upgrade

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Originally Posted by Timbucus View Post
So I ask what the hell is going on and why does it work fine leaving NWDS disconnected from Pin 20 /OE - and that pin floating of course.
I’m assuming you meant NRDS disconnected from /OE.

On the 6116 and 6264, the /WE takes priority over /OE.

/OE is possibly floating low, but not a good idea to run it like this as it could possibly damage the input, both input transistors would be partly on.
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Old 4th Nov 2020, 11:26 pm   #73
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Default Re: MK14 memory upgrade

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Quote:
Originally Posted by Timbucus View Post
So I ask what the hell is going on and why does it work fine leaving NWDS disconnected from Pin 20 /OE - and that pin floating of course.
I’m assuming you meant NRDS disconnected from /OE.

On the 6116 and 6264, the /WE takes priority over /OE.

/OE is possibly floating low, but not a good idea to run it like this as it could possibly damage the input, both input transistors would be partly on.
Yes sorry you are correct NRDS typing too fast.

Warning accepted - I assumed it would be not a good idea nice to understand why.

I would be interested to see what Sirius has done with his if it has diverged from the circuit above in some way and what he has on Pin20.
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Old 5th Nov 2020, 12:39 am   #74
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Default Re: MK14 memory upgrade

Well now, do you remember that I got myself all confused and convinced myself there was supposed to be a 4K7 pullup on NRDS, when in fact the SOC VDU instructions stated that it should be on NWDS?

Although I did subsequently fit the 4K7 resistor between NWDS and +5V I never actually removed the NRDS 4K7 pullup, which is situated on my 'bridge board' along with the RAM upgrade circuit.

This really should not matter because the VDU has a 4K7 pullup on NRDS, but, if I don't have the VDU plugged into the end of the bridge board then the only pullup on NRDS is the one on the bridge board. My bridge board does work as a 'RAM pack' if I just have that plugged onto the end of the MK14, but it might not if I didn't happen to have that 'unnecessary' 4K7 pullup on NRDS on the bridge board?
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Old 5th Nov 2020, 1:06 am   #75
Timbucus
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Default Re: MK14 memory upgrade

Just went to try that and discovered an errant ground lead on pin 20 left over from adapting the board to the 62256 - removed that and reconnected NWDS and all is fine - the signal looks a bit messy but, the RAM seems to work so by luck I was not running it floating but, boy did everything else struggle when I connected NRDS...
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Old 5th Nov 2020, 1:09 am   #76
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Default Re: MK14 memory upgrade

Great, that's another step forward, the more equality we have between systems the greater scope we have for replicating the same tests.
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Old 19th Nov 2020, 3:40 am   #77
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Default Re: MK14 memory upgrade

Looking at the connections available at the edge connector of Slothie’s VI I think there are two options to expand the memory beyond the 4K. If we make a module that fits in place of the SCMP with the address latch and extra decoding then it would also contain the replacement SCMP. This module could also connect to the edge connector of the VI if the SCMP was still removed from the MK14. Am I forgetting any other control signals that need to be connected only through the SCMP socket?

Trying to stay within 100mm x 100mm, with either a+b male din connector or pads to solder an edge connector.

I was thinking of buffering the address lines but not the data lines, as the higher address lines are loaded with two or three 74ls inputs in the MK14 address decoding, while I think the data lines only have one 74ls load each. 74hct573 or 574 to latch A15..A12 could also buffer A11..A8, these don’t need to be latched but they could be. A second could also buffer A7..A0.
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Old 19th Nov 2020, 9:52 am   #78
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Default Re: MK14 memory upgrade

Bear in mind that when a VDU is used IT drives the address lines so any buffering on the address lines will need to be bidirectional, assuming there will be a passthrough connector on the outer end for connection of the VDU / what have you.
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Old 19th Nov 2020, 11:32 am   #79
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Default Re: MK14 memory upgrade

Reviewing what I said above, if this particular expansion will fit in the CPU socket (like Martin L's expansion for his Czech replicas) and the VDU still connects to the edge connector then the address lines from the expansion to the system only need to be output or tri-state.
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Old 19th Nov 2020, 3:15 pm   #80
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Default Re: MK14 memory upgrade

I was thinking the address buffers would drive towards the MK14 and could be permanently enabled if the vdu was also driving the input of those buffers, though not sure if that changes the behaviour of the address lines during interrupted writes.

Should I be providing a way to set A15..A12 when the vdu drives the address or is the vdu only allowed to access the bottom 4K?
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