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Vintage Computers Any vintage computer systems, calculators, video games etc., but with an emphasis on 1980s and earlier equipment. |
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#21 |
Pentode
Join Date: Jun 2012
Location: Bristol, UK.
Posts: 112
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I believe one problem with the MK14 has always been the PCB size/shape.
Is this not an opportunity to adopt a 'standard' board size, with separate keypad? And for 64K/multiboard I recommend buffering address/data buses. Latching the SC/MP status flags can be useful here.
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#22 |
Pentode
Join Date: Jan 2021
Location: Northampton, Northamptonshire, UK
Posts: 109
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There are actually only 2 pullups on A10 (one is on NA10) which is why I increased the pullups to 10K though I take your point about all the LS inputs loading it as well.
I'm beginning to think there are actually two different requirements here - for a slightly improved MK14 and then an all singing all dancing SC/MP computer ? I could leave the MK14E pretty much as is but then develop a second board intended for NIBL rather than SCIOS ? (no display/keyboard but with the same backplane for some compatibility with e.g. VDU) A question for those more knowledgeable on SCIOS - I thought it wouldn't work with the full 16-bit address bus decoded i.e. with LK5 in the '0' position and that it would have to be disconnected i.e. 'X', but it seems to work fine ? Is that link position therefore unnecessary ? (probably don't need LK5 at all if this remains a MK14) |
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#23 | |
Heptode
Join Date: Mar 2011
Location: North Yorkshire, UK.
Posts: 911
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Re the 2nd option, its sounds like a great opportunity to run Karen's 'PAGE2' system! |
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#24 |
Dekatron
Join Date: Aug 2011
Location: Newcastle, Tyne and Wear, UK.
Posts: 11,086
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I have another suggestion, slightly more mundane than the others - the MK14 PCB has never had any provision for the mainboard to be mounted on a backplate or in an enclosure, the only holes ever drilled through the PCB were those provided for the mounting of the keypad.
While those existing holes can also be used with standoffs below the PCB, the PCB could do with another two mounting holes further back. I realise this doesn't sit well with an already closely packed design, but if it can be done... |
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#25 |
Dekatron
Join Date: Aug 2011
Location: Newcastle, Tyne and Wear, UK.
Posts: 11,086
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It would mean more work for Chris but I would prefer to see the proposed revision remain recognisably an MK14 with the sensible changes that have been made, namely the move to more affordable EPROM and RAM, the original PROM images removed and filled in with RAM, the awkward dangly single-step hardware moved onto the PCB where SOC should have put it in the first place, the system buses and control lines tracked to the rear edge. Those improvements, retaining the original form factor, are enough for me.
It seems to me that if you want anything more advanced it would be better to design a new SC/MP computer from the ground up to cater for as many of people's special needs as may be possible. |
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#26 |
Pentode
Join Date: Jan 2021
Location: Northampton, Northamptonshire, UK
Posts: 109
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Phil__G - so I presume the LK5 'X' and '0' positions are both useful ?
SiriusHardware - I'm sure I can find a space for some mounting holes. Can anybody advise on the polarity of the Rx and Tx lines when used with NIBL, do I need to invert them for connection to e.g. an TTL FTDI serial cable ? I've looked at the Elektor BASIC computer and original Introkit but its not easy to work out as they are RS232 and 20mA ? |
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#27 | |
Octode
Join Date: Mar 2020
Location: Kitchener, Ontario, Canada
Posts: 1,195
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While checking that I realised you are clocking the high address using 74ls175 with NADS inverted, which would be the leading edge of NADS. With an edge triggered register its better to clock this on the trailing edge. I think the inverter on NADS is not needed. |
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#28 |
Pentode
Join Date: Jun 2012
Location: Bristol, UK.
Posts: 112
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Internally the SC/MP doesn't access those latched top Address lines. The p-counter goes up/down a single 4K 'page' like a hamster in a wheel.
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#29 | |
Pentode
Join Date: Jan 2021
Location: Ashford, Kent, UK
Posts: 249
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The RPi PICO module is a 40 pin dip but only 30 gpio are available (which is the max gpio from the RP2040 chip). Even if there was enough I/O the other problem is that the RP2040 is 3v3 part, so level translators would be needed to interface to the MK14 5V TTL bus. Even so, it would be an interesting project to try a Port-A only emulation using a PICO or similar. I suppose you could include a port expander chip to be able to provide A and B ports. |
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#30 |
Pentode
Join Date: Jan 2021
Location: Northampton, Northamptonshire, UK
Posts: 109
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Ah yes I've just checked this myself and you're correct its not needed for the 175 however I still need an inverted NADS for the Single Step circuit (taken from the original MK14 manual).
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#31 | |
Octode
Join Date: Mar 2020
Location: Kitchener, Ontario, Canada
Posts: 1,195
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Edit: OK I see it now, uses inverted NADS and D7 to reset the counter. Last edited by Mark1960; 26th Feb 2023 at 10:11 pm. |
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#32 |
Octode
Join Date: Mar 2020
Location: Kitchener, Ontario, Canada
Posts: 1,195
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Its probably still better not to invert NADS for clocking the upper four bits of the address. If you use the trailing edge it allows overclocking the 8060 to 8MHz, but using the leading edge doesn’t.
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#33 |
Octode
Join Date: Mar 2020
Location: Kitchener, Ontario, Canada
Posts: 1,195
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I think the flag output needs to be inverted for serial output but not the sense input. I seem to remember this was the same for the 8072.
https://www.dos4ever.com/SCMP/SCMP.html#introduction |
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#34 |
Pentode
Join Date: Jun 2012
Location: Bristol, UK.
Posts: 112
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In my experience NADS at the '8060 is a seriously degraded pulse and needs a buffer.
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#35 |
Octode
Join Date: Mar 2020
Location: Kitchener, Ontario, Canada
Posts: 1,195
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I think NADS can be improved with an external pull up. 74ls ttl inputs seem to pull up enough to make a difference, but the rise time slows down after it rises above the logic high threshold. I have noticed with 74HCT inputs that the rising edge timing on the output can vary between different 8060s.
I was wondering if maybe the 8060 doesn’t have depletion mode pull ups on the outputs, but maybe there is just something different about the NADS output driver. |
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#36 |
Pentode
Join Date: Jan 2021
Location: Ashford, Kent, UK
Posts: 249
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When developing RealView it took me a while to spot that NADS has a very slow rising edge, but interestingly it's even worse just after NENIN has been asserted. From what I recall NADS would reach about 50%, stall and then continue rising at a slower rate. I ended up using a 1K pull up to ensure the edge was good enough for direct interface to a XILINX CPLD (5V tolerant but not slow-edge tolerant, it turned out).
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#37 | |
Pentode
Join Date: Jan 2021
Location: Northampton, Northamptonshire, UK
Posts: 109
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I have more confidence in the Elektor BASIC and dos4ever computer so will go with Tx inverted ! Chris PS revised schematic and layout almost ready for final (?) inspection. |
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#38 |
Dekatron
Join Date: Jun 2015
Location: Biggin Hill, London, UK.
Posts: 5,055
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The normal current loop interface has the current flowing in the 'mark' state. This corresponds to a -ve voltage on the RS232 TxD line and a high level -- logic 1 -- at the TTL level output of most, if not all, UART etc chips.
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#39 |
Pentode
Join Date: Jan 2021
Location: Northampton, Northamptonshire, UK
Posts: 109
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Thanks for that Tony, in that case it ties up with the Introkit circuit as well. Its been over 40 years since I last went near a 20mA current loop !
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#40 |
Triode
Join Date: Feb 2014
Location: Redditch, Worcestershire
Posts: 27
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On my Elektor SC/MPuter clone I just used 74LS14 inverter from FLAG0 to MC1488 RS232 driver and MC1489 RS232 receiver directly connected to SENSE-B input.
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David |
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