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#401 | ||
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Dekatron
Join Date: May 2008
Location: Derby, UK.
Posts: 7,966
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Quote:
So far, I've run most of my tests on an emulated 4016 -- that is, a 16KB machine -- because I was really only interested in &8000-&83FF (the screen memory on a 40-column PET), &0100-&01FF (which the 6502 uses as its stack space) and &0000-&00FF (which the 6502 treats as a sort of memory-mapped register file -- think TMS9900 on steroids.) Once you know for sure these memory locations are sound -- values written there read back correctly, and writing a value to one location has no effect on the value stored in any other location -- then you can use all the instructions available on the 6502. Having a stack and being able to use the indirect addressing modes obviate the need to poke instructions into RAM and execute them there (which is what's going on with the first two rows of the screen. The countdown between tests is going too fast for the CRTC; it actually loops 4 times per scanline, so the units byte will look like garbage as it will be displaying rows from 8 different characters each time the beam gets to it). I'm testing on an emulated 4032 (with 32KB of RAM) now I know your "4016" has 32KB despite the nameplate, so looking for RAM from &0000 all the way up to &7FFF. Quote:
Before you desolder anything, take a good look at the board and decide whether or not there are any solder joints it's worth redoing and testing it again.
__________________
If I have seen further than others, it is because I was standing on a pile of failed experiments. |
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#402 | |
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Nonode
Join Date: May 2018
Location: Northampton, Northamptonshire, UK.
Posts: 2,593
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It was the probe setting (rather than the 'scope's software-setting), that I'd wondered about.
As setting the 'Attenuation' switch on the probe to x10, would reduce the voltage into the 'scope by 90%, so only a tenth at the 'scope input - in case it (being a PC-based one, without mechanical input-divider switch) got overloaded more-easier as electronic input attenuator couldn't hand as high a level as conventional 'scopes.. - The 'scope's (software) x10 / x1 setting will probably just alter the readout, to be correct as to what the 'probe is set to. It looks like that link was to your local PC drive! - But I found a copy here: https://www.sigmaelectronica.net/manuals/Hantek6022BE_Manual.pdf And looking in the specifications of this manual, I see it says: Max. Input +/- 5V(Without external attenuation) - Which is rather-less than most conventional stand-alone 'scopes. So you do need external attenuation (e.g. a x10 probe / a x1/x10 Switchable one set to x10) to measure > 5V voltages correctly. Quote:
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#403 | |||
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Nonode
Join Date: May 2018
Location: Northampton, Northamptonshire, UK.
Posts: 2,593
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As these original CharGen ROM's seem rather-prone to failure, one you do obtain could also fail quite soon (assuming it works OK to start with, when you get it!) - A bit like C64 PLA's...
You could always keep working originals safe, and normally operate these with a substitute PCB-Module - Assuming these original IC's are mainly failing when powered? rather than just due to age / something internally that wasn't manufactured too-well and degrading over time - to try to preserve the originals. I recall someone doing this with all original the ROM's/RAM's in a PET (2001? - so non-JEDEC Commodore/MOS specials) at last year's annual 'ZAPP live' Commodore show in Kenilworth (Which co-incidentally is this weekend - Now on Sat & also Sun, and I've just got a ticket for in case they sell out as has previously happened) Owen Quote:
Quote:
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#404 | |
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Nonode
Join Date: May 2018
Location: Northampton, Northamptonshire, UK.
Posts: 2,593
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Quote:
I seem to recall one of these filters had failed on another PET Thread on here, some time ago. And IIRC, it was another one of Colin's? - So presumably replacements for these can be obtained? (Although I'm not sure if it does that-much filtering with a linear PSU ? Maybe it was needed to meet tighter FCC approvals / stop mains-transients getting through and affecting operation?) |
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#405 |
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Dekatron
Join Date: Aug 2011
Location: Newcastle, Tyne and Wear, UK.
Posts: 13,693
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I think on that previous occasion we did identify a modern filter with spade tag terminals which would have been an acceptable substitute, but the original ones are usually just removed once found to be faulty.
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#406 |
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Octode
Join Date: Mar 2011
Location: North Yorkshire, UK.
Posts: 1,439
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Someone bought a very nice looking PET at Retrotech - I couldnt make out the model under the 'sold' sticker but it had a real keyboard... maybe it will appear here?
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#407 | |
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Nonode
Join Date: May 2018
Location: Northampton, Northamptonshire, UK.
Posts: 2,593
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Quote:
It was a Model 4032, as on the front RHS (The sold sticker was on the CRT, when I saw it) - Just as the one here effectively now is. So I mentioned this (+attached a picture of it) yesterday in this thread, in post #378: https://www.vintage-radio.net/forum/showpost.php?p=1702043&postcount=378 |
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#408 | |
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Nonode
Join Date: May 2018
Location: Northampton, Northamptonshire, UK.
Posts: 2,593
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Quote:
And he could find the remains of this, when he redoes all the mains-wiring to ensure it is safe, as wires could no doubt be rather-corroded / insulation starting to break-up, if badly stored. |
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#409 | |
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Dekatron
Join Date: May 2008
Location: Derby, UK.
Posts: 7,966
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Quote:
ToePost. It looks a little bit like "Test" and "Pet"; it's kind of snappy; and perhaps most importantly, it isn't already taken for another software project -- the only links it turns up are to sandals. There's also an "interdigital" joke waiting in the wings somewhere. Absent any objection, I'll create a GitHub repository tonight.
__________________
If I have seen further than others, it is because I was standing on a pile of failed experiments. |
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#410 |
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Dekatron
Join Date: Aug 2011
Location: Newcastle, Tyne and Wear, UK.
Posts: 13,693
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It is whatever you decide to call it.
Putting it in an off-site repository now is probably quite a good idea - in the past when we've been 'developing' code as we go along and attaching it to thread posts, we have come to the realisation that the forum never forgets, so once you attach a version to a post which which is subsequently found to be buggy, imperfect, or simply isn't finished, you as an ordinary forum member have no power to delete or amend it after the edit timeout, so it stays there effectively forever to be found, downloaded and stashed, although anyone with any sense will read the thread all the way through to find the 'final' version. |
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#411 |
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Nonode
Join Date: May 2012
Location: Perth, Scotland
Posts: 2,436
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I wish I could do it by looking at datasheets and schematics, but that doesn't seem to work for this particular old dog.
Colin. |
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#412 | |
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Nonode
Join Date: May 2012
Location: Perth, Scotland
Posts: 2,436
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Whoops re the link - apologies.
re the x10, both the scope software settings and the probe switch were set to x10, so I'm still not clear what's happening here but for now it doesn't seem to have got in the way of things. Colin. Quote:
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#413 | |
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Nonode
Join Date: May 2012
Location: Perth, Scotland
Posts: 2,436
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Yes - I had one on my 8032-SK which went pop partway through the repair thread so I bypassed that one too.
Replacments were identified but I couldn't really see the point - there's more detail here regarding their use and why they were fitted: http://blog.tynemouthsoftware.co.uk/2015/08/exploding-commodore-pet-mains-filters.html Colin. Quote:
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#414 | |||
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Nonode
Join Date: May 2012
Location: Perth, Scotland
Posts: 2,436
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Here's a further stupid question:
Where is Zero Page RAM? The reason I ask is if it is only in the lower RAM bank then when I set it to a 16K PET it passed the sero page RAM tests (post 213) with an early version of ToePost (v3). So I'm wondering why zero page now fails with v9 of the code when the PET is set to be a 32K device? Colin. Quote:
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#415 |
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Dekatron
Join Date: Jun 2015
Location: Biggin Hill, London, UK.
Posts: 6,034
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A 'page' is simply 256 memory locations with the top 8 bits of the address the same.
So zero page is the memory locatons 0000 to 00FF. The reason it's important is that the 6502 has a 'zero page addressing mode' for some instructions. The instruction includes an 8 bit address which references one of those 256 locations. Such instructions are shorter (only need to have one address byte rather than 2 for a full address anywhere in memory) and faster than the corresponding instruction that can access any memory location. As a result it is common to use the zero page almost like extra processor registers to store commonly-used machine code variables, etc. Needless to say most 6502 software will fall over if there are faulty locations in page 0. Page 1 (0100 to 01FF) is another important page as that's where the 6502 system stack has to be located (the stack pointer is 8 bits long, the processor hardware fills in the upper byte of the address as 01 for all stack-reference instructions) |
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#416 |
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Dekatron
Join Date: May 2008
Location: Derby, UK.
Posts: 7,966
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It's not a stupid question! Sometimes it's good for us old hands to be reminded we weren't born knowing this stuff.
"Page" is a 6502-ism for a 256-byte block of memory whose addresses differ only in the upper 8 bits. So we might talk about "page 81" of memory, meaning &8100 to &81FF. And we might talk about "page boundaries". If an instruction that involves calculating an address changes the high byte of the address from what was supplied in the instruction, the 6502 takes an extra clock to execute it; meaning sometimes you might need to think carefully about where code or data is located if you want your code to run as fast as possible. Zero Page RAM is just the area of memory with addresses from &0000 to &00FF, which the 6502 treats as a kind of extended register file. Data here can be accessed using special short addressing modes with instructions only 2 bytes long as opposed to the usual 3 bytes (so it's good to have commonly-accessed variables); and pairs of bytes in zero page are used to hold pointers for the indirect addressing modes. The area from &0100 to &01FF is also special on the 6502, as this is used for the hardware stack. The 6502 expects at least these areas to be populated with RAM. Though if you're careful, you can get away with less than a full page of RAM, as long as you arrange for the memory to be addressable from both locations and pre-load the stack pointer. (The Atari 2600 famously had just 128 bytes of memory at locations &0080 to &00FF, echoed at &0180 to &01FF. Locations &0000 to &007F were used for I/O.) And I guess that's why I have been making such a big deal of testing pages &00 and &01. Oh, and each of the 4116 memory chips on the PET is just one bit wide, but has 16384 distinct locations within it.
__________________
If I have seen further than others, it is because I was standing on a pile of failed experiments. |
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#417 |
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Nonode
Join Date: May 2012
Location: Perth, Scotland
Posts: 2,436
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Thanks Tony/Julie. Got it.
Here's my next daft question. The schematics refer to Lower RAM Block (odd numbered 4116s in this PET) and Upper RAM Block (even numbered 4116s in this PET). Does that therefore mean that Page 0 and Page 1 are located completely within the Lower RAM Block and therefore never in the Upper RAM Block? Colin. |
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#418 |
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Dekatron
Join Date: Jun 2015
Location: Biggin Hill, London, UK.
Posts: 6,034
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Yes, I think so.
The 2 blocks of RAM are separately selected by having CAS0/ pulse low for the lower block and CAS1/ pulse low for the upper block. Now on sheet 6 of the schematics, look at the 3 NAND gates in UD5 on the right hand side of the sheet. For both page 0 and page 1, address line 14 (BA14) is low, obviously. So during RAM accesses to those pages, UD5 pin 13 is low, UD5d is thus inhibited and CAS1/ must remain high. But UD5 pn 6 will be high (inverse of BA14) so UD5c will pass the CAS pulse from UE2 pin 12. CAS0/ will there for go low, selecting the lower RAM block for both of these pages. |
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#419 |
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Nonode
Join Date: May 2012
Location: Perth, Scotland
Posts: 2,436
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Thanks Tony.
Last daft question for now then. If I change the jumpers to make this a 16k PET and it passes Julie's Zero Page check, there should be no reason for that check to fail when the PET is reconfigured to be a 32K PET? Colin. |
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#420 |
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Dekatron
Join Date: Jun 2015
Location: Biggin Hill, London, UK.
Posts: 6,034
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What exactly do you change to make it a 16K PET? Is it just the Y and Z jumpers on schematic sheet 6? If so, then a '16K PET' should not ever assert CAS1/ so should never access the upper block of RAM.
Of course there could be a fault in the RAM (meaning it tries to output data when it shouldn't) or in the block select or RAM timing logic on sheet 6 |
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