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Vintage Computers Any vintage computer systems, calculators, video games etc., but with an emphasis on 1980s and earlier equipment.

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Old 19th Jul 2023, 1:48 pm   #201
SiriusHardware
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Default Re: Commodore PET 4032/8050/3022

Quote:
while scoping any of UD16's output pins
Grr, UD14, not UD16.
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Old 19th Jul 2023, 2:20 pm   #202
ScottishColin
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Default Re: Commodore PET 4032/8050/3022

Done and all much better. All traced through UD13 and UD14 through to J9.

Colin.
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Old 19th Jul 2023, 3:03 pm   #203
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Default Re: Commodore PET 4032/8050/3022

I guess you can throw those buffer ICs away, unless you have some kind of black museum that you like to keep the dead ones in.

I take it you have tried it briefly back in normal configuration to see if replacing the buffers has miraculously fixed the machine? If not...

Keep the NOP gen in for now,

Have another look at UD5 pins 11 and 8, anything happening on there yet?

The next major area is the address decoder UE12. Check the supply volts on its power pins, (+Ve, pin 24, GND, pin 12).

Scope pins 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15 in that order (Note: Pin 12 is skipped as it is the GND pin). All should have a fairly low frequency waveform on them which is mainly high, momentarily low.

If that is so, put your scope into dual channel mode, channel 1 trace above, channel 2 trace below. Set the scope to trigger on the falling edge on the upper trace (channel 1).

Use the scope to view the low-going pulses on the pairs of UE12 pins below, channel 1 on the first pin, channel 2 on the second pin.

What you should see in each case is pulses of the same low duration on each trace, but offset in time, so there is a low going pulse at the start of the upper trace followed by a low going pulse on the lower trace. The lower trace pulse should start just as the upper trace pulse finishes.

Pins 4, 5
Pins 5, 6
Pins 6, 7
Pins 7, 8
Pins 8, 9
Pins 9, 10
Pins 10, 11
Pins 11, 13
Pins 13, 14
Pins 14, 15

Last edited by SiriusHardware; 19th Jul 2023 at 3:10 pm.
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Old 19th Jul 2023, 3:22 pm   #204
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Default Re: Commodore PET 4032/8050/3022

I have activity on UD5 pins 8 and 11 - see attached. Both traces are the same.

Colin.
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Old 19th Jul 2023, 3:24 pm   #205
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Default Re: Commodore PET 4032/8050/3022

UE 12 pin 24 - 5.8V
UE 12 pin 12 - 784mV

Colin.
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Old 19th Jul 2023, 3:30 pm   #206
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Default Re: Commodore PET 4032/8050/3022

Keep going!
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Old 19th Jul 2023, 3:30 pm   #207
ScottishColin
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Default Re: Commodore PET 4032/8050/3022

So here's a sample one before I go too far - UE 12 pins 5 and 6 triggered as below.

It doesn't look very smooth to me - have I done something wrong?

Colin.


Quote:
Originally Posted by SiriusHardware View Post
I guess you can throw those buffer ICs away, unless you have some kind of black museum that you like to keep the dead ones in.

I take it you have tried it briefly back in normal configuration to see if replacing the buffers has miraculously fixed the machine? If not...

Keep the NOP gen in for now,

Have another look at UD5 pins 11 and 8, anything happening on there yet?

The next major area is the address decoder UE12. Check the supply volts on its power pins, (+Ve, pin 24, GND, pin 12).

Scope pins 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15 in that order (Note: Pin 12 is skipped as it is the GND pin). All should have a fairly low frequency waveform on them which is mainly high, momentarily low.

If that is so, put your scope into dual channel mode, channel 1 trace above, channel 2 trace below. Set the scope to trigger on the falling edge on the upper trace (channel 1).

Use the scope to view the low-going pulses on the pairs of UE12 pins below, channel 1 on the first pin, channel 2 on the second pin.

What you should see in each case is pulses of the same low duration on each trace, but offset in time, so there is a low going pulse at the start of the upper trace followed by a low going pulse on the lower trace. The lower trace pulse should start just as the upper trace pulse finishes.

Pins 4, 5
Pins 5, 6
Pins 6, 7
Pins 7, 8
Pins 8, 9
Pins 9, 10
Pins 10, 11
Pins 11, 13
Pins 13, 14
Pins 14, 15
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Old 19th Jul 2023, 3:35 pm   #208
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Default Re: Commodore PET 4032/8050/3022

The relative timing of the pulses looks right but overall, they look horrible. Go back to single channel mode and look at each one in turn, do they all look like that?
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Old 19th Jul 2023, 3:58 pm   #209
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Default Re: Commodore PET 4032/8050/3022

The other thing which could be causing that 'look' is the loss of the GND connection between the scope and the GND of the PET. Is that still properly attached?
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Old 19th Jul 2023, 4:32 pm   #210
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Default Re: Commodore PET 4032/8050/3022

|You were right = the earth had been dislodged.

So I got some good signals but nothing from pins 9,10,11 and 13 when trying to do the testing above.

I can get nothing from them with a single probe either.

Colin.
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Old 19th Jul 2023, 5:00 pm   #211
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Default Re: Commodore PET 4032/8050/3022

Replaced UE12 - all looking fine now.

I can't work out what's next from the schematics....

Colin.
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Old 19th Jul 2023, 5:10 pm   #212
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Default Re: Commodore PET 4032/8050/3022

Briefly aside, the next time you use two channels on the scope to observe similar signals, make sure both probes are set to the same multiplier (x10 in this case) and set both volts / div settings to the same value so that it is easy to see whether one signal is a different size to the other, for example. If you look back at the image you posted in #207, channel 1 is on 10V / div and channel 2 is on 500mV / div, making one signal look twice as high as the other. The difference would be even greater were it not for the fact that one channel is set for a X10 probe and the other probably isn't, we can't see all of the settings for that channel in that shot.

OK, as you correctly surmised there did seem to be a problem with UE12 so that's another one down. Have you given it a quick try to see if there is any life from the machine after that?
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Old 19th Jul 2023, 5:14 pm   #213
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Default Re: Commodore PET 4032/8050/3022

Thanks for the advice - duly noted.

I've tried it - no miracles have occurred. Reset is still being held high.

Colin.


Quote:
Originally Posted by SiriusHardware View Post
Briefly aside, the next time you use two channels on the scope to observe similar signals, make sure both probes are set to the same multiplier (x10 in this case) and set both volts / div settings to the same value so that it is easy to see whether one signal is a different size to the other, for example. If you look back at the image you posted in #207, channel 1 is on 10V / div and channel 2 is on 500mV / div, making one signal look twice as high as the other. The difference would be even greater were it not for the fact that one channel is set for a X10 probe and the other probably isn't, we can't see all of the settings for that channel in that shot.

OK, as you correctly surmised there did seem to be a problem with UE12 so that's another one down. Have you given it a quick try to see if there is any life from the machine after that?
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Old 19th Jul 2023, 5:21 pm   #214
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Default Re: Commodore PET 4032/8050/3022

Reset should be normally high, so that's one small thing which is OK. It might be worth trying (a) the Tynemouth board, asssuming it is compatible with this CRTC model, with its internal ROM and RAM enabled, and (b) Daver2's test EPROM in what I think will be the UD7 position in this mainboard - it is probably the only one of the main ROMs which is socketed.

I should assume that you will try all of this after each faulty IC found and replaced, because we could eventually get to the point where one of those will start working and that would give us a bit more information about the remaining faults.
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Old 19th Jul 2023, 5:35 pm   #215
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Default Re: Commodore PET 4032/8050/3022

Nothing from either the Tynemouth board or Dave's EPROM.

I suppose we don't actually know if here are any video circuitry problems yet either.

Colin.
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Old 19th Jul 2023, 6:00 pm   #216
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Default Re: Commodore PET 4032/8050/3022

No, and unfortunately this is a firmware controlled video circuit so, as noted earlier, no firmware being executed, no video or sync to activate the monitor.

There is a CRTC circuit 'life sign' test you can try which came about from a discussion I was loosely involved in in one of the threads over on VCFED, though - Daver's test code doesn't do the 'chirp' although I think he is intending to add that in to his V5 of the test code whenever he is able to put the finishing touches to it, but there is one predictable thing which it does do, and that is to access the CRTC controller IC exactly 36 times during the start-up phase - 18 closely spaced pairs of CRTC chip-enable pulses, to be precise.

So - let's divert for a moment, put everything in the machine the way it should be but replace UD7 with Daver2's test EPROM and then have a look at what happens to the CRTC chip select pin, pin 25, immediately after system start-up. To make this easier you might want to connect a momentary push switch (reset switch) across C50, the same capacitor you were shorting when we were testing the reset timer circuit earlier. It will make it much easier to restart the machine without having to do a heavy / dirty power on / power off each time.

You'll also want to configure your scope to only sweep once after it is triggered so it stores the activity (if any) on the trace so we can literally count the pairs of pulses.

If we get the 18 pairs of pulses, that will show that the CPU is actually executing code but that for some reason the CRTC section or chip is not responding. If so, we will look more closely at the CRTC circuit for a little while, otherwise we will just continue to follow the other signals in our usual relentless fashion.

Last edited by SiriusHardware; 19th Jul 2023 at 6:09 pm.
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Old 19th Jul 2023, 8:08 pm   #217
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Default Re: Commodore PET 4032/8050/3022

This (borrowed from the VCFED thread I mentioned earlier), is the 'picture' you are hoping to get from the CRTC chip enable pin when Daver2's test EPROM is fitted. If you see this shortly after initialisation, Daver2's code is running.

Note the time / div setting (50uS) which is needed to capture all 36 pulses in one screen width.
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Old 19th Jul 2023, 8:37 pm   #218
ScottishColin
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Default Re: Commodore PET 4032/8050/3022

I can't see anything like that (assuming the CTRC select chip is the 6345) on any time/div setting.

Colin.

Quote:
Originally Posted by SiriusHardware View Post
This (borrowed from the VCFED thread I mentioned earlier), is the 'picture' you are hoping to get from the CRTC chip enable pin when Daver2's test EPROM is fitted. If you see this shortly after initialisation, Daver2's code is running.

Note the time / div setting (50uS) which is needed to capture all 36 pulses in one screen width.
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Old 19th Jul 2023, 8:41 pm   #219
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Default Re: Commodore PET 4032/8050/3022

P.S. I quite like the relentless fashion.

Colin.
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Old 19th Jul 2023, 10:10 pm   #220
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Default Re: Commodore PET 4032/8050/3022

Quote:
I can't see anything like that (assuming the CTRC select chip is the 6345)
And that's specifically in the moments after reset? Seems like the system is still not able to execute code. Not to worry.

Quote:
I quite like the relentless fashion.
It's not working too badly is it? Several duff ICs found so far although I still can't believe the way you homed in on the exact 'large' IC which was holding the CPU in reset.

Put the original UD7 and the NOP gen back in.

Let's work through the select signals on the ROMs to make sure they are OK - they should be because they are coming from UE12 which you have replaced, but we had better check anyway, especially on UD7 which is probably in one of those notorious white sockets. Some of the chip selects also pass through additional gates after leaving UE12.

You are looking for low-going pulses, mostly the same kind / the same length of pulses as the ones on the outputs of UE12, on pin 20 of each of the main ROM chips (not including the char gen ROM). The exception is UD7, the low pulse on that pin will only be half as long as the low pulses on the other ROM chip select pins.

Another humdrum task, check the A0-A11 pins (Pins 8, 7, 6, 4, 3, 2, 1, 23, 22, 19, 18, in that order), on all of the main ROMs for the same frequencies you saw on the AB0-AB11 (CPU) address lines and the BA0-BA11 (Buffered) address lines.

Also check the state of the 'NO ROM' line which goes to pin 21 of all of the main ROMs. A low on this line would disable all of the ROMs.

Then check the chip select signals on the large ICs - UB16 pins 22, 23, 24 (should all be active) UB15 pins 23, 24 (should be active), UB2 pins 22, 23, 24 (should all be active), UB13 pin 25 (should be active).

After that, check a few outlying stragglers which perform narrower address decoding and chip enables / selects.

Each time you move onto a small 74 series IC for the first time, check the power supply pins for the correct supply voltage - unless otherwise advised they are virtually always the upper right (highest numbered) pin = 5V and the lower left pin = GND. For large ICs the power pins can be anywhere on the device, but they are usually indicated on the circuit diagram.

State the state of, or post the the appearance of the waveform on, the following IC pins.
Code:
UE15 pin 4
UE14 pin 8
UE11 pin 6
UE11 pin 8
UE13 pin 6
UE11 pin 1
UE11 pin 2
UE11 pin 3
UD4 pin 8
UD4 pin 6
We have established that the system doesn't appear to be able to run Daver2's code in the UD7 slot yet - one snag is that in order for code in that EPROM to run, UD6 has to be healthy because the 6502 goes there first and then (if UD6 is healthy) is told to jump into the code in UD7. But if UD6 is faulty, then that jump never happens. If the ROMs were all in sockets, we would have removed them and verified their contents fairly early on.

We'll leave the ROMs for the time being and look at the data bus next.
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