Sipmos MOSFET fails with no gate voltage applied...

[Al (astral highway)]

Originally Posted by kalee20

[...with bigger FETs, the idea of charging the gate of one via a 1k resistor means that there could be a significant delay between the input changing state, and the output.

Ahah, I see this, thank you. Only the author claims that this is deliberately to form a time-constant, when considered with the native gate capacitance of the MOSFET. I believed this without deeper consideration. Of course I don't know if the circuit was actually tested or is only a design sketch.

Originally Posted by kalee20

t's a nasty circuit. If the supply voltage Vs is lower than the Zener voltage of D1, but higher than the sum of the Vth of Q8 and Q9, and the input is Lo, then neither Q7 nor Q11 will be turned on. So Q8 and Q9 gates, together with R10, will be effectively floating.

Under such conditions, Sod's law applies and they will float to a mid-point voltage where Q8 and Q9 are both 'on' and you get shoot-thru current.

Thank you for doing the analysis. I know this is right in your area of professional expertise (you helped me a few years back with some ferrite magnetics design, training notes and relevant maths ) and you do this all the time, so I'lll take your advice with gratitude that I'm not going to waste time and blow up another prototype board!

[Al (astral highway)]

Edit: (I timed out.) The TC4451 and TC4452 are visible on the heatsink of the pic I posted.
The black mark on top of the heatsink is masking tape with black marker pen to reduce reflection of infra-red.

It was to check the temperature of the heatsink, which (by laser thermometer) rose to only 45-50 degrees C or so with a capacitative load on the gate drive transformer of 7nF, switching at 250KHz.

[Argus25]

Originally Posted by astral highway

I need an average of nearly 60W of drive power. Also I need an average of 1.2A per gate, and peak current of 20A per gate.

In that case the circuit concept I posted should still work, it will just require a bigger transformer, smaller value higher power rated resistors and perhaps just go to 20V zeners if the fet's G-S max is up to it and perhaps a few in parallel. As long as your circuit has a very low output impedance to drive the gates and cannot switch the two fets on together, under any circumstance, it should be ok.

The transformer (if you go down that road) needs enough inductance so that the core doesn't get near saturation during the cycle.

[Argus25]

Al,
I've attached the way the circuit would look with two nch output fets, I've got a feeling that nch mosfets are generally better than pch ones for on resistance and other specs. Somebody might weigh in on that ?

I think the advantage too, and the zeners, although a tad wasteful on power, on the fet that is turning off, the zener gets driven in the forward direction and creates a very low source impedance to discharge the gate capacitance. It might be worthwhile putting 10R resistors in series with the gates to avoid any parasitic oscillations.

[Radio Wrangler]

One caution,

Zeners can have quite high capacitance, especially power ones.

In fast circuits it can help to use a fast diode in series with the zener. And you might need to add a second fast diode to represent the forwards mode of the zener if needed this also reduces the voltage rating of fast diode needed..

Fast diodes to handle the same current as a zener can have a lot less C than the zener itself. An appreciable amount of your gate drive power can go into the zener charge/discharge.

David

[kalee20]

Transformer drive is excellent from many points of view:

It gives isolation from the switched devices (which can be really helpful for keeping switching spikes local)

It can stop faults from propagating 'backwards' right through the circuitry, if your power switching FETs die;

You can be certain that there's no possibility of 'shoot-through' current.

However, I'm dubious about Hug's circuit for the following reasons.

When the driver FET is 'on', no problem - the 20V will be imposed on the transformer primary. Being 1:1:1, the secondaries will have 20V also. One of these will reverse-bias its associated Zener, so the associated MOSFET gate will see 15V (and the associated 220Ω resistor will drop the remaining 5V, thus 23mA will flow). The other secondary will forward-bias its associated Zener, giving 0.7V drop, so its MOSFET will be 'off' and virtually the whole 20V will appear across the 220Ω, giving 91mA in this secondary. The primary current to sustain these conditions therefore will be 91 + 23mA = 114mA. On top of this will be a steadily rising magnetising current, depending on the transformer's inductance.

When the driver FET turns 'off', the transformer's inductance and back-EMF will attempt to reverse the voltages on the windings. There can be no current in the primary. But to achieve the target condition - the first FET 'off' and the second FET 'on', as we have seen we need 114mA to be flowing. This can only be the case if there was AT LEAST 114mA of magnetising current flowing at the moment of switch-off. If not, then we have the case of an inductor in parallel with a resistor (220Ω) which gives a reverse voltage, exponentially decaying to zero.

To achieve a magnetising current of 114mA at instant of the driver switch-off (so actual primary current is the 114mA of magnetising current plus the 114mA of referred secondary current, or 228mA total), the transformer's inductance needs to be sufficiently SMALL, and the 'on' time needs to be sufficiently long. It's not clear from Astral's initial posts whether this will always be the case - we don't know anything much yet about his application, but if it's switching at arbitrary frequency and arbitrary duty cycle, then simple transformer drive just won't work.

Duty cycles approaching zero, or approaching 100%, are difficult with transformers, although it can be done.

Originally Posted by Argus25

I've attached the way the circuit would look with two nch output fets, I've got a feeling that Nch mosfets are generally better than Pch ones for on resistance and other specs. Somebody might weigh in on that ?

They are. In silicon, mobility of electrons is better than mobility of holes. So for an equivalent N-channel MOSFET (where current is carried by electrons), a P-channel device of same die size and breakdown voltage has a higher on-resistance. If you want to get on-resistance down, the thing has to be bigger which means more gate capacitance, so harder to switch quickly!

[Argus25]

Originally Posted by kalee20

To achieve a magnetising current of 114mA at instant of the driver switch-off (so actual primary current is the 114mA of magnetising current plus the 114mA of referred secondary current, or 228mA total), the transformer's inductance needs to be sufficiently SMALL, and the 'on' time needs to be sufficiently long. It's not clear from Astral's initial posts whether this will always be the case

Yes, I agree, it depends on the nature of the drive signal and its DC conditions, which is why I suggested a magnetization of the core, which would require some DC bias on the input fet, in other words, the input fet should be biased into a class A condition (with a resistor from the gate to +20V) and the drive to its gate then could be coupled to it by a capacitor.

One thing to note, the architecture is no different than a giant audio output driver/stage without bias to eliminate cross over distortion. The cross over distortion creates the required "dead band" to prevent any chance of the output devices being in an on state together.

[Al (astral highway)]

Originally Posted by kalee20

Transformer drive is excellent from many points of view:

....It's not clear from Astral's initial posts whether this will always be the case - we don't know anything much yet about his application, but if it's switching at arbitrary frequency and arbitrary duty cycle, then simple transformer drive just won't work.

Duty cycles approaching zero, or approaching 100%, are difficult with transformers, although it can be done.

Good points to watch out for, thanks, and I have a couple of ideas. The explicit way you've articulated the possible perils is very helpful.

The architecture of Hugo's circuit, is, (I note, Hugo) not only seen in audio output stages, but is very popular with the flyback driver' building community - often a precursor step before getting enmeshed with the more esoteric HV projects out there. There are often back-to-back zeners in the gate to source.

The application, Kalee20? Well, for this one, it's just curiosity so far. It's to compare a high-powered IGBT driver made from discrete components with an off-the shelf one. The opportunity for experiment and comparison arose when the bespoke driver board failed after my on-board voltage regulator overheated under intense workload and passed overvoltage to the TC4451s.

Why am I so curious? Well....

Tons of development money must have been spent in making an IC like TC4451, which...

...[have]matched output rise and fall times, as well as matched leading and falling-edge propagation delay times.

The TC4451/TC4452 devices also have very low cross conduction current, reducing the overall power dissipation of the device.

These devices are essentially immune to upset, except direct overvoltage or over-dissipation. They cannot be latched under any conditions within their power and voltage ratings.

These parts are not subject to damage or improper operation when up to 5V of ground bounce is present on their ground terminals. They can accept, without damage or logic upset, more than 1.5A inductive current of either polarity being forced back into their outputs.

So that's quite a list that the manufacturer's of bespoke driver chips have thought about and addressed.

So can this circuit with discretes really prove reliable enough, resilient enough and powerful enough to knock out 20A pulses at a high duty cycle, through a gate drive transformer, to the gates out a large IGBT half-brick? We'll have to see.

At the moment, the nearest contender (UC37321/UCC37322) can manage 9A, but with thermal runaway problems as it has the tiny body of any old DIP-8 device.

Yesterday I pointed out the irony of buying such a beast of a 600A IGBT half-bridge in the first place. The financial commitment in buying that expensive component, a giant heatsink for it, and large, low ESR capacitors for the DC power supply, has locked me into a certain path.

It is demonstrably way harder, by an order of magnitude at least (although it feels more) to get drive circuitry to work for a beast like this than it is to charge the gate capacitance of only 1.2nF or so that is prevalent in smaller power devices. I could rustle up something to suit that circuit in a few hours; the bigger project not so.

[Al (astral highway)]

Originally Posted by Argus25

Yes, I agree, it depends on the nature of the drive signal and its DC conditions, which is why I suggested a magnetization of the core, which would require some DC bias on the input fet, in other words, the input fet should be biased into a class A condition (with a resistor from the gate to +20V) and the drive to its gate then could be coupled to it by a capacitor.

Hi Hugo, the drive signal under test conditions will be a 50% duty cycle 486KHz square wave from a board I knocked up last night with an old ceramic resonator and some hex-schmitt triggers in parallel as a buffer on the output.

I've wound the trifilar transformer on a small ferrite and I get beautiful square waves with fast rise times (<40nS) under no load conditions.

I'm waiting for a couple of other parts. I'm using N-channel FETs as I've had far fewer headaches with these and I had a couple of suitable candidates in my parts boxes.

It will be interesting to see how robust this circuit can be. If a circuit of this relative simplicity can stand on its own feet next to a very sophisticated bespoke gate driver chip that costs rather a lot more, it does raise some intriguing questions!

[Al (astral highway)]

Originally Posted by Argus25

I've attached the way the circuit would look with two nch output fets, I've got a feeling that nch mosfets are generally better than pch ones for on resistance and other specs.

Some complimentary pairs of MOSFETS are less immune to cross-conduction than others, my research last night found.

Thanks, Hugo... And yes, coincidentally, last night I started assembling the gate components using two N-channel MOSFETS, and completed and tested the ferrite transformer.

Originally Posted by Argus25

I think the advantage too, and the zeners, although a tad wasteful on power, on the fet that is turning off, the zener gets driven in the forward direction and creates a very low source impedance to discharge the gate capacitance.

Thank you Hugh. Very true and extremely useful. One addition I'm thinking of making is to put a Schottky diode across the gate resistors (anode to gate, gate on input), to speed up the switch-off time.

[kalee20]

Originally Posted by Argus25

Yes, I agree, it depends on the nature of the drive signal and its DC conditions, which is why I suggested a magnetization of the core, which would require some DC bias on the input fet, in other words, the input fet should be biased into a class A condition (with a resistor from the gate to +20V) and the drive to its gate then could be coupled to it by a capacitor.

Though to premagnetise the core, you'd want it magnetised in the REVERSE direction to what the driver transistor magnetises it - so that you increase not decrease the available flux swing! So either an extra supply rail (to provide reverse current) or an extra winding (with current passing in opposite sense) is needed.

Originally Posted by Argus25

One thing to note, the architecture is no different than a giant audio output driver/stage without bias to eliminate cross over distortion. The cross over distortion creates the required "dead band" to prevent any chance of the output devices being in an on state together.

A very good observation!

Originally Posted by astral highway

It is demonstrably way harder, by an order of magnitude at least (although it feels more) to get drive circuitry to work for a beast like this than it is to charge the gate capacitance of only 1.2nF or so that is prevalent in smaller power devices. I could rustle up something to suit that circuit in a few hours; the bigger project not so.

Robust, fast, and fault-tolerant gate drive circuits are not trivial. Adding low-dissipation to the requirements and you're writing the job spec for a full-time design engineer for a month! If you think the task is hard, it's because it is. But you'll learn loads. I know what won't work, but turning the 'possible' into reality often means snubbing out parasitics. Layout is often critical. If you are building Hugo's scheme, will wait for results!

[McMurdo]

Here's a nice little commercial circuit from the power supply of a power audio amp.
The driver transformer is just a small ferrite ring with a few turns on each winding (around 20 or so).
The driver IC takes care of the dead band.

PS these are IGBTs but the principle's the same

[kalee20]

That's the sort of drive which works very well. It forces the transformer for each polarity - so magnetising current can be arbitrarily low (inductance arbitrarily high).

It does suffer from the limitation that drive has to be symmetrical though. You can't have one of the power FETs being 'on' longer than the other. But you can have them both 'off' as long as you want.

Whether it meets Al's requirements remains to be seen!

[Radio Wrangler]

Originally Posted by astral highway

Yesterday I pointed out the irony of buying such a beast of a 600A IGBT half-bridge in the first place.

Long before the sort of power level being implied, most SMPS designers would have gone to a full-bridge architecture.

David

[Al (astral highway)]

Originally Posted by Radio Wrangler

Long before the sort of power level being implied, most SMPS designers would have gone to a full-bridge architecture.

Haha, indeed. It would have been so much easier! Lesson learned the hard way, not much lost except a longer time to bug-free completion.

[Refugee]

I have worked on units with 4 N-gate FETs and the power coupled to a single winding on the transformer with a very tough capacitor.
They used to blow up because of mechanical problems around the insulators on the tabs.
FETs with insulated tabs was my bounce stopper for those. They were 700W units.

[Al (astral highway)]

Originally Posted by kalee20

Robust, fast, and fault-tolerant gate drive circuits are not trivial. Adding low-dissipation to the requirements and you're writing the job spec for a full-time design engineer for a month! If you think the task is hard, it's because it is.

Thank you for pointing that out! It feels very supportive and helps me to calibrate the task with an external comparator!

Originally Posted by kalee20

Layout is often critical. If you are building Hugo's scheme, will wait for results!

Yes, we are go! I'll post results as they emerge!

[Argus25]

Al,

One way to drive the transformer in the circuits I attached is to use a power NPN transistor (on a heat sink)rather than a mosfet. The reason is it is easier to bias it with a resistor divider across the supply. And you can just use a small value emitter resistor like 1.5 to 15 ohms (bypassed with a 1uF capacitor), depending on the collector current and drive power you want make it so it drops about 3 or 4V across the emitter resistor, since you have a 20V supply and likely it will be thermally stable. That way the transformer primary current will be stable ( I have the equations for thermal stability of a class A transistor output amp if you need them but probably won't).

In a single ended drive like this (like any typical push pull transistor amplifier with a class A driver) it requires that energy is stored in the field of the transformer (in no signal conditions), so that it can produce both polarity output drive signals of equal power. Although it is not as efficient as having a split primary with push pull drive & no DC bias, or using a 4 transistor bridge circuit to supply the primary, but it is very simple as you don't need a push pull driver.

So just imagine your circuit as a typical analog amplifier, with cross over distortion, that you are simply over-driving into a square wave output.

[Argus25]

Out of interest I have attached a circuit of a computer psu.

They use complimentary drive to the transformer primary by transistors driven directly out of the SG3524 which acts like a bridge circuit with 1k resistors taking the place where a pair of conducting transistors would go. The SG3524 is a handy IC as you can easily vary the duty cycle.

The article on he supply is here:

http://worldphaco.com/uploads/The_IB...WER_SUPPLY.pdf

One other trick they did, since they use BJT's as the output devices and not mosfets, they ran the output connection around the transformer core, so as the output power and current increases, it reinforces the base currents of the output transistors which makes sure the transistors stay saturated as the collector current increases and makes it more efficient across a range of output loads, but not enough + feedback that it oscillates.

One thing to remember about these sorts of output stages and the one you plan to make, your output waveform has a DC offset on it equal to half the supply voltage. IBM got rid of that by capacitively coupling the primary of their output transformer. It is worth looking at how they did that (see pg 19), in the article, with a capacitive divider across the power supply for one transformer connection, rather than just a single series capacitor.

[Al (astral highway)]

Originally Posted by Argus25

Out of interest I have attached a circuit of a computer psu.

0ne thing to remember about these sorts of output stages and the one you plan to make, your output waveform has a DC offset on it equal to half the supply voltage. IBM got rid of that by capacitively coupling the primary of their output transformer. It is worth looking at how they did that (see pg 19), in the article, with a capacitive divider across the power supply for one transformer connection, rather than just a single series capacitor.[/QUOTE]

Thank you, Hugo. This is a fascinating paper that you put out there. You did an incredible investigation and analysis of that IBM board.

I don't know how long that must have taken you, but it says a great deal about the depth of your curiosity, rigour and depth of attention.

Yes, the capacitative divider is a very good scheme here. I'll take note.

To merge two posts, I'm currently mulling whether to use your BJT idea or stick with the MOSFET - although with some added variable bias arrangements for the MOSFET that aren't in the least onerous and I've used before in a successful AM high-side modulator circuit.. .

There was a non-linear region in the mock-up I made last night, completely explained by using only a 15v8 power supply instead of 20v. The output in the driver transistor (ideally in class A) was non- linear, with a kink in the amplified drive square wave until the DC voltage on the downstream square wave source increased to 15-16V, but I figured out why.

I can do the maths, so it won't be a problem at all.