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Components and Circuits For discussions about component types, alternatives and availability, circuit configurations and modifications etc. Discussions here should be of a general nature and not about specific sets.

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Old 14th Jan 2022, 8:08 pm   #21
ChristianFletcher
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Default Re: Lower Than Expected Input Impedance

Wow that certainly is very interresting. I have a few circuits that I can try now thanks. I am however trying to keep the build very simple and using jelly bean parts. My first circuit was just a basic follower but I have found a bit of gain has some advantage. I need go back and measure the impedence of my follower
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Old 14th Jan 2022, 8:25 pm   #22
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Default Re: Lower Than Expected Input Impedance

Here's a couple of screenshots showing the two simulations for input impedance from 10Hz to 100kHz for your first circuit. One is based on a Genesys library (non-linear) model of a classic process 50 JFET the 2N5485.
The other one is about as crude as it gets as I've used a VCCS model and the capacitances from the datasheet for a typical process 50 JFET.

The two sets of results look very similar for parallel capacitance, parallel resistance and mag Z. If I edit the VCCS model to have the worst case capacitance shown in the MPF102 datasheet the impedance drops to about 6Meg ohm at 1kHz.

I hope these models and simulations are OK. I'm not used to using or modelling JFETs down at AF. Therefore, I don't have high confidence in the plots below. The agreement for the two model types is very good though!
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Old 14th Jan 2022, 11:09 pm   #23
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Default Re: Lower Than Expected Input Impedance

I tried building your first circuit whilst the football was on and I used a BF256B JFET. This is a process 50 JFET. I've only tested it at 1kHz but the simulation predicted a 5.7dB drop in level when the 10Meg resistor is fitted inline at the input.

I tested the real circuit and saw a fall from 300mV to 155mV at 1kHz when the 10Meg resistor was added. This is also a drop of about 5.7dB so it agrees very well with the simulation. The input impedance of the JFET isn't a pure resistance so this will mean that the voltage drop is slightly less than half when the series 10Meg resistor is fitted at the input. This seems to be working the way I would expect based on the basic models I used in Genesys.
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Old 14th Jan 2022, 11:15 pm   #24
ChristianFletcher
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Default Re: Lower Than Expected Input Impedance

Thanks Jeremy

Your models look amazing. I’m still a bit confused by the value of Cp shown in blue. Is that showing the capacitance varying with frequency. It’s been a lot of years since I done any modelling using spice. Oh and thanks for building the circuit. Looks like again our results are very similar.

Can you provide a bit more information about your modelling software. I would be interested in trying it. I was going to make a video on using the probe do you mind If I refer to your modelling

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Last edited by ChristianFletcher; 14th Jan 2022 at 11:23 pm.
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Old 16th Jan 2022, 12:10 am   #25
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Default Re: Lower Than Expected Input Impedance

Yes, the blue trace is the input parallel capacitance in pF vs frequency.
I dug out my Analog Discovery 2 this evening and had a go at measuring the input impedance of the real JFET probe circuit I built.

To show the agreement with the simulation I've re-plotted the simulation plots to have the same axis scaling. I've also made separate plots for the parallel capacitance vs frequency. This was just a first attempt and it really is stretching the limits of the impedance jig I'm using and probably also the Analog Discovery 2. The nice thing is the plots seem to agree quite well although the Analog Discovery 2 data is a bit noisy. I'm actually quite pleased it managed to produce these results at the first attempt. See the plots below.

The software I use for the simulation is an old version of Eagleware Genesys. Agilent/Keysight bought the software from Eagleware in 2005 and they gave it a facelift and added some more features. You can refer to the modelling and use the plots if you like but they always look a bit fuzzy when uploaded to the forum.
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Old 6th Feb 2022, 11:56 am   #26
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Default Re: Lower Than Expected Input Impedance

Thanks to everyone who helped with debugging my Active demodulation probe for use with the K7000 signal tracer. I’m fairly happy that it produces a big improvement over a typical passive probe but it lacks dynamic range and overloads easily. But perhaps that was always going to be a compromise.

I made a video on how the impedance of test gear can effect the measurement and how to build the demodulation probe. My special thanks to Jeremy for his hard work on the electronics simulation

Link here and live premier this morning https://youtu.be/j6X4rxOwom4
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