6-gang FM stereo tuner heads

[Radio Wrangler]

Originally Posted by G0HZU_JMR

That 3708A looks like a neat and versatile instrument. Amongst its tricks it looks like can do a similar thing with bandpass filters, a power meter and a noise source.

A Swiss Army Knife for signal to noise ratio work. It can also handle thing like Eb/No. I designed the NBW-stable filters in it and the PIN switch moving the power meter between signal and noise paths.

Did the software to get prototype hardware doing useful things at the breadboard stage, and it formed the dissertation for my Master's and it trail-blazed the way for the proper, fast firmware to follow.

David

[G0HZU_JMR]

That's interesting, thanks. In the past I've put together a simulation for my own 70MHz noise BPF as I won't always be able to keep borrowing the company filters. The simulation is below. It will be difficult to achieve the 30dB return loss in reality, but I think I'll succeed with a bit of tweaking.

To minimise measurement uncertainty, the Telonic filters manage about 30dB return loss at the centre of the 70MHz filter and this probably requires hand selected components. I managed to achieve this with a simulation that included strays and PCB effects but I've never tried building it. I opted for a compromise with just under 10MHz BW. My noise source spans LF through to about 180MHz, but the average output power is only about -3dBm. So, I need a fairly wide filter in order to get (say) -15dBm on the power meter when this is passed through the 70MHz filter..

[G0HZU_JMR]

Here's an old VNA plot of the wider Telonic BPF. I think it has drifted a bit over the last 30-35 years as the return loss plot is no longer symmetrical. However, it still manages to achieve over 30dB return loss at the centre frequency.

I tried to design a 70MHz filter with >30dB return loss over a wider bandwidth than the Telonic filter. I'm not sure how close I'll get to the simulation, but I think my filter response will look nicer than the Telonic filter when finished. I think I still need to improve the return loss near the band edges, so will have to trade something here.

[G0HZU_JMR]

One of the biggest headaches is none of FM broadcast tuners use 50-ohm circuits, they are full of high impedance nodes at both I/O stages. Unlike the QRP, CW and SSB homebrew projects, there are zillions of schematics online that use 50 ohm topology, making the impedance matching less of an issue. If you use a matching pad for the FM antenna input and stick a hi-Z FET probe into different hi-Z nodes of the RF stages or mixer, it is difficult to isolate the effects of impedance mismatch and the FET probe's contribution of TOI measurement, i.e. it will get muddy fast. I have not thought about adjacent channel IMD testing. I dont know how manufacturers could get around the 50ohm-hi-Z mismatch issues in the 1970s, they could have some form of dedicated broadcast receiver analyzers to do the job.

RF simulation tools and component models are quite advanced now so it should be possible to model the high Z stages of an FM tuner. This could also be done in a spice simulator like LTSpice.

However, I'm not so sure about modelling rotary air-spaced caps up at VHF for your ganged tuning but I thing it could be done with some help from a nanovna. I'm not sure what bandwidth could realistically be achieved until this modelling was carried out.

I also tried putting together a VHF FM receiver front end in the receiver analysis spreadsheet. I have no experience of designing receivers for broadcast FM so this was just a bit of fun. See below. It looks like a basic gang tuned front end (using two RF stages) achieves just under 7dB noise figure and an input TOI of just under +5dBm. I chose a front end RF amp with a fairly modest 3dB noise figure in the analysis below. There's room for improvement here I think.

I also had a go at building the simulated 70MHz BPF yesterday. See the VNA plot below. This filter was designed using a computer as I needed to optimise every cap value and inductance value to achieve a reliable 30dB return loss at the centre of the band. This is best done with a computer as it can optimise the component values whilst taking into account the layout parasitic effects. Every component had to be hand measured before fitting it. The aim here was to make something better than the Telonic 70MHz filters.

I've used exotic ATC porcelain caps and a very rigid form of construction in order to make it rugged and reliable. The VSWR of the filter has to be very low in order to minimise mismatch uncertainty. So I needed to be able to achieve good matching at both the input and the output of the filter. I'm quite pleased with the result. I just need to box it up now.

[regenfreak]

RF simulation tools and component models are quite advanced now so it should be possible to model the high Z stages of an FM tuner. This could also be done in a spice simulator like LTSpice.

However, I'm not so sure about modelling rotary air-spaced caps up at VHF for your ganged tuning but I thing it could be done with some help from a nanovna. I'm not sure what bandwidth could realistically be achieved until this modelling was carried out.

I also tried putting together a VHF FM receiver front end in the receiver analysis spreadsheet. I have no experience of designing receivers for broadcast FM so this was just a bit of fun. See below. It looks like a basic gang tuned front end (using two RF stages) achieves just under 7dB noise figure and an input TOI of just under +5dBm. I chose a front end RF amp with a fairly modest 3dB noise figure in the analysis below. There's room for improvement here I think.

I also had a go at building the simulated 70MHz BPF yesterday. See the VNA plot below. This filter was designed using a computer as I needed to optimise every cap value and inductance value to achieve a reliable 30dB return loss at the centre of the band. This is best done with a computer as it can optimise the component values whilst taking into account the layout parasitic effects. Every component had to be hand measured before fitting it. The aim here was to make something better than the Telonic 70MHz filters.

I've used exotic ATC porcelain caps and a very rigid form of construction to make it rugged and reliable. The VSWR of the filter has to be very low to minimise mismatch uncertainty. So I needed to be able to achieve good matching at both the input and the output of the filter. I'm quite pleased with the result. I just need to box it up now.

I have finally made it to my parent's home after nearly 20 hours of travel. I am kind of jet-lagged, having brain fog. I have not really tried to master LTSpice. It is a question of free will, what is defined as pleasure and pain? Do I need to put myself through the process of learning all theories in a 3-year electronic degree course? There is a day and night difference between designing your circuit and adapting a proven design. I have no desire to mess around with designing my own circuits because life is so short. Besides, not all transistor models are available in LTSpice and the model parameters are not foolproof. I would use LTSpice to understand a simple circuit instead of designing something practical like a working FM tuner.

An electrician is dumb if he makes a short circuit by accident. On the contrary, it is smart to derive the Y-parameters by shorting the circuits in a two-port network model. Lots of those linearised models of transistors use black-box approaches that are dull and dry, as they never bother to explain the rational thinking behind equations and models. Those circuit theories can be off-putting and counter-intuitive.

I don't think it is viable to model the variable gang air capacitor in LTSpice easily. I would simplify the problem and pick the central frequency 98MHz or 100Hz for analysis.

For the 6-gang FM tuner, I used Elsie to predict the Butterworth BPF input and output impedance, resonators' coupling and bandwidth. I created an Excel spreadsheet that very accurately solves and predicts the tracking of the 6-gang capacitor based on accurate measurements of the capacitance of each gang section, the piston trimmers and the coils. I have nailed the tracking in every tuner I have built. Other than that the input and out impedance matching between BPF stages and the RF amplifier/mixer are guesswork and based on observation of many existing designs.

Yes, the parasitics are the key to everything of homebrew BPF. I played with 5-pole Butterworth and 7-pole BPF for 10.7MHz IF with better phase linearity. They work very well but are susceptible to out of alignment due to temperature change and mechanical vibration even though I used silver-plated ceramic trimmers. I applied nail polish to fix the wires in the toroids. In one of my older posts, I connected the 5-pole Butterworth and 7-pole Chebyshev in cascade through a buffer IF amplifier, so I will have 12 poles to tune. The buffer amp has a big impact on the overall bandpass response curve. I had to realign all 12 poles once they were in a chain. That was fun! It is not hard to get S21 right but getting good S11 can be tricky.

Many FM tuners have integrated multi-pole phase-linear filters potted in air-sealed resin so that they are mechanically stable. I have the circuit boards for Technics ST-9030 and JVC JR-S600, and both use 3 to 5-pole phase linear filters in an integrated package.

[regenfreak]

I have been reading stuff about Y- and H-parameters for two-port network models for transistors. I think it is a necessary evil before I even try to touch on LTSpice of amplifiers. It would not be hard to understand the Y- and H- parameters if one can relate them to the derivations of S- and Z- parameters for a VNA two-port measurement. The worst part of most textbooks is that they simply drop the equations without explaining the context, reasoning and thinking behind the models. Anyone who has never used a VNA would struggle to understand abstract two-port network models. However if one can see that it is basically an attempt to characterise the small-signal response of a DUT or a black box by measuring the output by applying input stimuli.

Since most real-world DUT requires an interface (e.g. measurement probes) that connects the coaxial and non-coaxial transmission lines. The calibration procedure with open, short and thru is to move the measurement plane to the probe tip and to mathematically remove the effects of the parasitics of the interconnections. The resistive loads are used as terminations to provide broadband boundary conditions for the mathematical solutions. This is the basis of S-parameters and can be expanded to Y admittance and H hybrid parameters in the characterisation of transistors.

It is quite easy to have a half-arsed understanding of transistor models because there are so many different types of transistors, configurations and linearised small-signal models. Understanding the maths/theories does not mean understanding the real-world applications of the problems, and vice-versa. I can see how anyone can get lost in a jungle of models and equations.

I have found this textbook: Radio Receiver Design by McClaning and Vito. It covers all of the stuff discussed in this forum thread, especially the last two chapters on cascade systems with worked example calculations:

https://nvhrbiblio.nl/biblio/boek/Mc...r%20design.pdf

So this will be brain-teasing stimuli for the nerds who want to understand the basic design principles of modern receivers.

[G0HZU_JMR]

It's probably best to start out with really basic VCCS models based on the datasheet of a suitable device for use in the front end of your receiver. A good place to start would be to look at a common gate JFET amplifier. The datasheet should provide some info about capacitances and transconductance.

This probably won't be your preferred device but JFETs are easy to model for small signal behaviour, even at 100MHz. Spice models ought to be better but sometimes they are optimised for non-linear performance and the small signal behaviour isn't captured as well by the Spice model.

The ideal small signal model would be extracted from a real JFET using a VNA and this would produce an accurate 2 port model of the JFET at the chosen operating point. The results should be really good at 100MHz. It is possible to find s-parameter data from the JFET manufacturer in common gate and this data usually spans the VHF FM band. However, it's a good thing to try and take s-parameter data over the full frequency range that the device can display instability, but I don't think many designers go to these lengths. The manufacturers generally don't provide s-parameter data for JFETs over such a wide frequency range so this doesn't exactly help. Often, experience will lead a designer to add snubber networks where applicable.

The nice thing about the common gate JFET is that the device can be close to unconditionally stable (even up at UHF) if the gate pin is directly soldered to the PCB ground plane. This is why the U310 is used a lot up at VHF. It is housed in a metal case and the gate is bonded to the metal case with a very short connection. Sometimes the designer will solder both the gate pin and the metal can of the U310 to the PCB groundplane. This minimises any inductance in the gate and this really helps with stability. Using the plastic TO-92 packaged J310 variant in a CGate RF amplifier is much more risky (because there will be more inductance in the gate pin) and usually some form of snubbing resistance (maybe even an RL network) will be needed at the drain pin if unconditional stability is desired up at UHF.

The SOT-23 variant of the J310 can show close to unconditional stability if the gate pin is directly grounded to the PCB case. The connection from gate pin to PCB ground ideally needs to have less than 1nH inductance to achieve this.

Once you get the hang of JFETs (at 100MHz) then maybe look at dual gate mosfet devices. These are a bit harder to model (from datasheet info) but sometimes the manufacturer provides s-parameter data.

Once you get the hang of this stuff, then maybe look at other stuff like Y or H parameters. However, at 100MHz a lot can be done using a really basic VCCS model based on the datasheet.

[G0HZU_JMR]

See below for a quick example. The VCCS model is just a voltage controlled current source. I think LTSpice has this model included. All the VCCS model does is convert voltage at its input to current at its output. This can be expressed in A/V but usually it's represented by mho. In this case 12 mmho or millimho (12mA/V or 0.012A/V)

Note that this simulator requites a negative number for the transconductance. So I've entered -12mmho for the VCCS model.

The SOT-23 packaged MMBFJ310 datasheet is here:

https://www.onsemi.com/download/data...mmbfj310-d.pdf

This shows the common gate transconductance is 12mmho.
The drain to gate capacitance is 2pF
The gate to source capacitance is 4.1pF
The output conductance at 10mA is about 100mmho (10k ohm)

In the simulation below I've put these numbers into a basic device model and compared the result with s-parameter data from a real MMBFJ310 JFET in common gate. I've added a tuned circuit at the drain at the output to make a 100MHz narrowband amplifier. This makes it a bit more interesting and relevant to VHF FM amplifiers.

Despite the basic nature of the VCCS model, you can see that the results are really similar for s21 s12 s11 s22. I've included 0.5nH in the gate leg of the VCCS model. This could be removed and a direct ground connection added here. However, when analysing for stability, even 1nH inductance here can cause instability issues up at UHF. I can show why 1nH can cause a stability problem here is if that helps?

[G0HZU_JMR]

Here's what happens if I'm allowed to tweak the 2pF drain-gate capacitance (from the datasheet) to 1.84pF. This is a tiny change.

The traces now agree very closely indeed. This shows that even at 100MHz it is possible to model some components (for small signal analysis) quite successfully by just using the info from the datasheet. The amplifier shows about 16dB gain at 100MHz. The output match is good (s22) but the input match isn't great. The Rs is about 170 ohms with very little reactance showing at 100MHz. This would be good for the noise figure performance but at the expense of the ~ 3.5:1 input VSWR.

[regenfreak]

It's probably best to start out with really basic VCCS models based on the datasheet of a suitable device for use in the front end of your receiver. A good place to start would be to look at a common gate JFET amplifier. The datasheet should provide some info about capacitances and transconductance.

This probably won't be your preferred device but JFETs are easy to model for small signal behaviour, even at 100MHz. Spice models ought to be better but sometimes they are optimised for non-linear performance and the small signal behaviour isn't captured as well by the Spice model.

The ideal small signal model would be extracted from a real JFET using a VNA and this would produce an accurate 2 port model of the JFET at the chosen operating point. The results should be really good at 100MHz. It is possible to find s-parameter data from the JFET manufacturer in common gate and this data usually spans the VHF FM band. However, it's a good thing to try and take s-parameter data over the full frequency range that the device can display instability, but I don't think many designers go to these lengths. The manufacturers generally don't provide s-parameter data for JFETs over such a wide frequency range so this doesn't exactly help. Often, experience will lead a designer to add snubber networks where applicable.

Thanks. I have not come across the acronym VCCS (voltage control current source) model of a FET until now. I am ignorant of the transistor theories. I have some MMBFJ310 lying around. The common gate FET is equivalent to the grounded grid or common grid triode. It has low input Z and high output Z. The high output impedance makes it a good current source. It is used in the upper stage of a cascode amplifier or in high frequency CMOS RF receivers. I can see the advantage of low input impedance in VNA measurement as you can connect the VNA port directly to the source. I am interested in your choice of the output coupling cap C3, high- Z LC tuned circuit with unusually large L to C ratio which is not a typical value used in FM receivers.

I have stumbled across this government report of the S-parameters of transistors:

https://nvlpubs.nist.gov/nistpubs/Le...ation400-5.pdf

On page 21, there is a description of a test probe making up of the pi-resistive matching networks that allow calibration and de-embedding calculations. This looks like what would be a proper broadband S-parameter measurements by semi-conductor manufacturers. However the values of the pi-networks have to be calculated based the admittances of the equivalent circuits, heavy stuff.

I am not sure if i should be self-flagellating myself to learn LTSpice modelling. After long day of work, I prefer to use my brain less and may choose to watch Youtube videos of military aircraft or cats. Most often it is more fun to build the actual circuits than messing around with simulations. There are low frequency, high frequency models of transistor...infinite permutations of types, configurations and models.

I have seen a few IEEE papers on FM tuner design written in the 1960-70s. All of them involve some design calculations using the y-parameters of the the FET with stability analysis, scary stuff. Examples are:

A HIGH-PERFORMANCE FM TUNER UTILIZING A GROUNDED-GATE FET RF AMPLIFIER by J. P. GrosJean (see the circuit in the 2nd attachment, the output is connected to a 2-pole variable tuned bandpass filter ).

Also,

AN FM TUNER USING MOS-FET's AND INTEGRATED CIRCUITS Barrett et al.

AN FM FRONT END WITH A HIGH GAIN UNNEUTRALIZED JFET T. Hanna and P. Froess

MOSFET FM TUNER DESIGN Richard Klein

In Richard Klein's paper, it is possible to adapt the 75 ohms dual-gate mosfet mixer test fixture for IMD measurement (see 1st attachment).

Slowly I am starting to make sense of the Y- and H-parameters of two-port networks. Basically it is revolving around the idea of two ports with four terminals, the current going into the terminals of port 1 is equal to that of coming out, the current going into the terminals of port 2 is equal to that of coming out. Y- , H- and Z two-port networks are permutation of the same idea: You always have a dependent variables ( Vn or In ) on left of the matrix equations, independent variables on the right. The 2x2 matrix are the parameters which are partial differentiation derivatives assuming some parameters to be constant ( Vn=0 for short, In =0 for open, or holding some voltage or current constant ). There are literally a jungles of two-port H-parameters for transistors. For BJT, it is possible to deduce hfe and hoe from the curves of transistor characteristics. Some datasheets publish the y-parameters in the form of complex numbers or polar form.

However, when analysing for stability, even 1nH inductance here can cause instability issues up at UHF. I can show why 1nH can cause a stability problem here is if that helps?

Stability is a very difficult subject, another deep black hole. I dont really want to look at the stability circles in the Smith chart. The question remains the same: am I a masochist who derives pleasure by cramping my brain with all these complicated stuff?

[G0HZU_JMR]

I had a look at the IEEE papers and they are very old. The technical description and the analysis methods are about 50 years old. This makes it all appear very daunting to any reader. It's best to use modern tools and modern models to do the analysis as this is faster, more reliable, doesn't need lots of equations and it will also reveal more info about stability issues over a much wider bandwidth.

Sadly, even in recent times RF design books are mainly written by academics who simply regurgitate 50 year old equations (that someone else derived for them 50-70 years ago) and this fills the pages with equations. What is often missed are any applied design examples and even if the examples are given they aren't built and verified in any detail.

For example, a lot of RF design books or papers will claim that common base and common gate amplifiers are inherently stable. However, what the academics don't realise (because no-one gave them the equations to understand and copy) is that common base and common gate amplifiers are notorious for instability issues up at UHF. This even applies to dual gate mosfet amplifiers. Look at virtually all circuits and design literature for dual gate mosfet amplifiers and they will claim high stability due to low feedback. Often, this stuff is written by people with little to no real experience of making real hardware. If they do make real hardware, then they haven't made enough versions to find out the inherent instability modes in these devices up at UHF. What this means for the reader is confusion (when their amplifier oscillates) and frustration when they read what the academics claim about stability.

However, spend just a few minutes with even the crudest VCCS model on a simulator, and you will realise that these devices are extremely prone to instability at out of band frequencies. This will teach you the stuff that is missed in many of the RF theory books. Common base BJTs are usually the worst offenders although common gate JFETs can suffer too if the package inductance is significant. None of this is mentioned in your IEEE papers but maybe it wasn't fully understood back then. Computers were in their infancy (and generally unavailable) back then so any mathematical analysis would often have been done with limited tools and it would have taken ages even at one test frequency. Today, a modern computer can do the stability analysis over 1000 frequencies in a blink of an eye.

[G0HZU_JMR]

An interesting JFET to experiment with up at VHF is the CHP3910. These are still available from Mouser.

https://www.onsemi.com/pdf/datasheet/cph3910-d.pdf

The datasheet says that this JFET is used for AM tuners but I find that it also works well up at VHF with a low noise figure. I've got some of these devices here. A while back I made a VHF FM preamp using these parts but sadly I can't find it. I think I may have used two of them in parallel as a common gate amplifier and I fitted an LC ladder network at the drain to get enough bandwidth to cover the whole of the 88-108MHz FM band. I think I managed to get about 12dB gain from it. I can't remember what the noise figure was but I'd expect it to be less than 3dB as I matched it for low noise.

See below for a GMAX plot. This shows that over 15dB gain is possible up to about 500MHz in common gate mode when used in a tuned amplifier. It's almost unconditionally stable although this requires a direct connection to the groundplane. It's safest to add a 12R chip resistor in series at the drain as this raises K well above 1 everywhere.

[nemo_07]

Originally Posted by regenfreak

...
Slowly I am starting to make sense of the Y- and H-parameters of two-port networks. Basically it is revolving around the idea of two ports with four terminals, the current going into the terminals of port 1 is equal to that of coming out, the current going into the terminals of port 2 is equal to that of coming out. Y- , H- and Z two-port networks are permutation of the same idea: You always have a dependent variables ( Vn or In ) on left of the matrix equations, independent variables on the right. The 2x2 matrix are the parameters which are partial differentiation derivatives assuming some parameters to be constant ( Vn=0 for short, In =0 for open, or holding some voltage or current constant ). There are literally a jungles of two-port H-parameters for transistors. For BJT, it is possible to deduce hfe and hoe from the curves of transistor characteristics. Some datasheets publish the y-parameters in the form of complex numbers or polar form.
...
Stability is a very difficult subject, another deep black hole. I dont really want to look at the stability circles in the Smith chart. The question remains the same: am I a masochist who derives pleasure by cramping my brain with all these complicated stuff?

There is no magic behind all this stuff. It's all about circuit parameters for AC signals, expressed with use of complex numbers, just because they are very handy for circuit analysis calculus, and also very illustrative as they show you magnitude and phase of any parameter when represented as a vector in the Re-Img complex plane (here from the term "phasor").
It follows, the complex numbers arithmetic as well as elementary vector arithmetic is obligatory, and is all what is required, plus Kirchhoff's circuit laws, of course.
There is no problem to swap Y, H, Z and S parameters ... online.
The 2x2 matrices contain in general derivatives because the intention is to use linear algebra and only "small signal parameters" for common semiconductor devices are adequate (i.e. represent quasi-linear behaviour, can deliver closed formula solutions and usable results). While this calculus is simple and looks nice its sole advantage is giving an insight into circuit operation of qualitative rather than quantitative nature (if we put aside circuits working with really small signal levels, for example like few mV or below, when applied to BJT inputs). And this way we can also arrive at analytical conditions for negative resistance on the input port (as mentioned earlier for the Hi-Z probe; actually not the matrix algebra but simplified JET model and two node equations were used there to solve for Zin = 1/Yin) or some general stability criteria for an active two-port ... where we have conditional or unconditional (i.e. for any combination of In/Out terminating admitances, including open/short) ones, by Rollet, Linvill, Stern ...
Embedding such two-port boxes into any circuit of passive components (which are inherently linear) with multiple nodes allows to use general graph analysis and matrix algebra to analyse more complex structures (what simulators will do).
For majority of practical circuits large signal models would actually be required, but this is where non-linear analysis enters the stage, with all unpleasant implications and where really hard work starts. ...

I haven't read the paper yet, but this circuit https://www.vintage-radio.net/forum/...9&d=1670903486
with tapped coils is quite practical.
If you add a 75-to-50 Ohm resistive Pi adapters with 6dB attenuation on both sides you can use standard 50 Ohm T&M equipment without corrupting the loaded Q of LC tanks.
You can then view the S21 selectivity trace on your TinySA and check S11/S22 for optimum I/O match, or run a two-tone tests.
Put the input data: 50 Ohm, 75 Ohm, 6dB into https://chemandy.com/calculators/mat...calculator.htm
You get: shunts 86.517 & 2386.203 Ohm and series 45.747 Ohm. Easy to compose from standard values.
No need for Hi-Z probe.

[Radio Wrangler]

Originally Posted by G0HZU_JMR

For example, a lot of RF design books or papers will claim that common base and common gate amplifiers are inherently stable. However, what the academics don't realise (because no-one gave them the equations to understand and copy) is that common base and common gate amplifiers are notorious for instability issues up at UHF. This even applies to dual gate mosfet amplifiers. Look at virtually all circuits and design literature for dual gate mosfet amplifiers and they will claim high stability due to low feedback. Often, this stuff is written by people with little to no real experience of making real hardware. If they do make real hardware, then they haven't made enough versions to find out the inherent instability modes in these devices up at UHF. What this means for the reader is confusion (when their amplifier oscillates) and frustration when they read what the academics claim about stability.

However, spend just a few minutes with even the crudest VCCS model on a simulator, and you will realise that these devices are extremely prone to instability at out of band frequencies. This will teach you the stuff that is missed in many of the RF theory books. Common base BJTs are usually the worst offenders although common gate JFETs can suffer too if the package inductance is significant. None of this is mentioned in your IEEE papers but maybe it wasn't fully understood back then. Computers were in their infancy (and generally unavailable) back then so any mathematical analysis would often have been done with limited tools and it would have taken ages even at one test frequency. Today, a modern computer can do the stability analysis over 1000 frequencies in a blink of an eye.

One of those cases where repetition ad inf does not make something true!

To look at the obverse can be illuminating... oscillators for UHF can often resemble an emitter follower with only a small inductance from base to RF ground, creating a negative resistance at the emitter, where a tuned circuit, series mode, lives. Re-draw this and you have a grounded base amplifier with stray L in the base. Eventually, you start to realise that attempts to optimise NF in low power amps and efficiency in high power amps come at the cost of skating closer to the edge of instability.

Jeremy's comments on academics are right on the money.

David

[nemo_07]

Originally Posted by G0HZU_JMR

...
Sadly, even in recent times RF design books are mainly written by academics who simply regurgitate 50 year old equations (that someone else derived for them 50-70 years ago) and this fills the pages with equations. What is often missed are any applied design examples and even if the examples are given they aren't built and verified in any detail.

For example, a lot of RF design books or papers will claim that common base and common gate amplifiers are inherently stable. However, what the academics don't realise (because no-one gave them the equations to understand and copy) is that common base and common gate amplifiers are notorious for instability issues up at UHF. This even applies to dual gate mosfet amplifiers. Look at virtually all circuits and design literature for dual gate mosfet amplifiers and they will claim high stability due to low feedback. Often, this stuff is written by people with little to no real experience of making real hardware. If they do make real hardware, then they haven't made enough versions to find out the inherent instability modes in these devices up at UHF. What this means for the reader is confusion (when their amplifier oscillates) and frustration when they read what the academics claim about stability.

However, spend just a few minutes with even the crudest VCCS model on a simulator, and you will realise that these devices are extremely prone to instability at out of band frequencies. This will teach you the stuff that is missed in many of the RF theory books. Common base BJTs are usually the worst offenders although common gate JFETs can suffer too if the package inductance is significant. None of this is mentioned in your IEEE papers but maybe it wasn't fully understood back then. Computers were in their infancy (and generally unavailable) back then so any mathematical analysis would often have been done with limited tools and it would have taken ages even at one test frequency. Today, a modern computer can do the stability analysis over 1000 frequencies in a blink of an eye.

Heh,
academics or not, there are multitude of individuals on the net longing for recognition?, fame?, whatsoever.
Wanna be a star? Make a web page, put there some fancy equations, preferably borrowed from someone else, and add few sophisticated arguments. It costs close to nothing and you are on the road to start a guru career.

Equations, whether old or brand new are not a problem. As long they describe the underlying device model they are valid (whether they are of any use or not is another story).
The problem arises, when the model is overly simplified or neglects crucial components. In the UHF or microwave band all the parasitic impedances stemming from package leads, circuit arrangement & layout, I/O coupling, etc. cannot be ignored. It suffices to state, that e.g. at 1GHz a 1nH lead inductance shows a j6.8 Ohm reactance, and a 1pF inter-electrode capacitance shows -j160 Ohm. Now having at hand a device with gm = 100mS and Ft > 1GHz one can easily imagine, that such parasitics cannot be regarded as negligible in a real circuit.

When it comes to simulators, they can be very useful tools (especially when used to solve iterative problems), but like any tool, they will not teach you anything or tell you something you didn't already know. They will serve your requests. To put a reasonable question some basic understanding of circuit theory is a must. A novice in the field, lacking this knowledge of circuit operation will be served with answers without a word of explanation or comment. Education does not work this way.
Still worse things happen when a simulator is fed with inconsistent data or insane requests. On the net you can spot some funny, if not lunatic, conclusions drawn by students of electronics using simulators applied to simple transistor circuits. Some of these kids today will acquire academic grades tomorrow. And then some of them will start to write RF design books and "simply regurgitate 50 year old equations (that someone else derived for them 50-70 years ago)"... Here we are again.

Concerning D-G MOSFETs stability issues the old RCA AN-4431 "RF Applications of the Dual-Gate MOS FET up to 500 MHz" is worth of reading.

Cheers.

[G0HZU_JMR]

You seem to be missing the point. I'm arguing that the books don't expand beyond the basic equations. Real world issues with real world devices are not described. The books are lacking in essential experience/detail in other words.

When it comes to simulators, they can be very useful tools (especially when used to solve iterative problems), but like any tool, they will not teach you anything or tell you something you didn't already know. They will serve your requests. To put a reasonable question some basic understanding of circuit theory is a must.

When I started my career in design well over 30 years ago, the thing I wanted most of all was the simulation software because I could learn so much from it. Humans have been learning by making mistakes ever since we first walked the planet. Some of the greatest discoveries have been made through making mistakes. Attempt one thing, then fail at it but discover something else in the process. I've done this many times using an RF simulator. It's much quicker than using a soldering iron or trying to do it all with a calculator. It's also a great tool to further understanding via experimentation.

[regenfreak]

There is no problem to swap Y, H, Z and S parameters ... online.

Lots of things are easier said than done. The 1s attachment is the conversion equation table for S-, Y- and H- parameters. I have no intention of entering the .net statement with all two-port parameters for a specific FET to create my own LTspice model. I hope somebody else would do the tedious donkey work. I think there is a mix-up here, between hobby and professional engineering. I am neither an electronic engineer nor an undergraduate student of an electronic engineering degree, my background is aerospace engineering, and I just do it for fun and relaxation (chillaxing like D. Cameron in Cornwall with his surf board). When it becomes too serious and theoretical/mathematical, it spoils the fun. I only started this hobby 5 years ago...I never laid my hands on SW and Ham radios until two years ago.

You can then view the S21 selectivity trace on your TinySA and check S11/S22 for optimum I/O match, or run a two-tone tests.
Put the input data: 50 Ohm, 75 Ohm, 6dB into https://chemandy.com/calculators/mat...calculator.htm
You get: shunts 86.517 & 2386.203 Ohm and series 45.747 Ohm. Easy to compose from standard values.
No need for Hi-Z probe. You can then view the S21 selectivity trace on your TinySA and check S11/S22 for optimum I/O match, or run a two-tone tests.
Put the input data: 50 Ohm, 75 Ohm, 6dB into https://chemandy.com/calculators/mat...calculator.htm
You get: shunts 86.517 & 2386.203 Ohm and series 45.747 Ohm. Easy to compose from standard values.
No need for Hi-Z probe.

There is no need to use the lossy resistive matching pad for 75 to 50 ohms adaption. Just adjust the coil tapping positions and check the S11 and S22 (reverse the port of a NanoVNA) to get the best I/O impedance matching.

I completely forgot that I purchased some 3N201 a few months ago which the sole intention to build and test the 3-gang FM tuner published in Richard Klein's IEEE paper from Texas Instruments Incorporated. I have the Siglent SSA3021X Plus which makes the TinySa redundant now.

G0HZU_JMR An interesting JFET to experiment with up at VHF is the CHP3910. These are still available from Mouser.

https://www.onsemi.com/pdf/datasheet/cph3910-d.pdf

The datasheet says that this JFET is used for AM tuners but I find that it also works well up at VHF with a low noise figure. I've got some of these devices here. A while back I made a VHF FM preamp using these parts but sadly I can't find it. I think I may have used two of them in parallel as a common gate amplifier and I fitted an LC ladder network at the drain to get enough bandwidth to cover the whole of the 88-108MHz FM band. I think I managed to get about 12dB gain from it. I can't remember what the noise figure was but I'd expect it to be less than 3dB as I matched it for low noise.

The 2nd and 3rd attachments show even better test set-up for the measurement of S11, S21 and TOI with two-tone measurements with a 3N201..The mixer circuit be modifed for and 10.7MHz IF. The Pi-networks can be changed for 100Mhz but the I/O t impedance or admittance in complex numbers have to be found. Gate 1 has to be driven at a high level. The most troublesome bit is to wind my our IF transformer with 50ohm output. I have about 30 blank Toko style IF coils with ferrite tuning slugs and tin shields..
I have never tried to measure S22, S12 by reversing the ports of the NanoVNA. In any case, I wont be back in the Uk until after xmas. I am in Hong Kong and may go to the electronic flea market to get double-sided PCB boards...


My next 6-gang FM tuner will use 3SK45 for the cascade double-tuned RF amps and 3SK49 as a mixer. I will use 3SK45 and 3SK49 because I got some lying around.

I have some BB204B varicaps and BF961, they are reserved for 5-6 gang FM tuner project as I have limited experience building tuners with multiple gang varactor tuning.

[dmowziz]

Originally Posted by G0HZU_JMR

This shows the common gate transconductance is 12mmho.
The drain to gate capacitance is 2pF
The gate to source capacitance is 4.1pF
The output conductance at 10mA is about 100mmho (10k ohm)

In the simulation below I've put these numbers into a basic device model and compared the result with s-parameter data from a real MMBFJ310 JFET in common gate. I've added a tuned circuit at the drain at the output to make a 100MHz narrowband amplifier. This makes it a bit more interesting and relevant to VHF FM amplifiers.

Despite the basic nature of the VCCS model, you can see that the results are really similar for s21 s12 s11 s22. I've included 0.5nH in the gate leg of the VCCS model. This could be removed and a direct ground connection added here. However, when analysing for stability, even 1nH inductance here can cause instability issues up at UHF. I can show why 1nH can cause a stability problem here is if that helps?

Hi Jeremy... Thanks as always for your insights.
Maybe a learner like me will go through this thread someday : I'm thinking you made a typo. with the output conductance. Yeah?

An inductor at the base or capacitor at the emitter generates negative resistance... It can be proved through beta transform. Dennis Feucht shows this in his nice book (handbook of analog circuit design).
The first attached image is a picture that captures the basic ones.
But please show us why, I think you'll use s-parameters or ....


I attempted making the oscillator (base inductance) with the VCCS, including the package inductances. Used the model from this nice thread that does the oscillator with emitter capacitance :
https://www.vintage-radio.net/forum/...=147265&page=2

The 2nd image is the schematic (including psu)... Tried to design it for 50 ohms output. Increased the current and calculated for gm

The equivalent shunt inductance (looking into the source is 20nH. The negative conductance is -9.081e-3. A series source inductor will flatten the conductance
Please does it mean that the Q of the source capacitor has to have an equivalent parallel resistance greater than only 110 ohms?

Messy board, could not get the solder to connect to the holes for ground, so used tapes)... Please how to make the board better?


Thanks for posting about the CPH Jfet. I got it recently after seeing your thread about it for LNA for VHF... Was eventually going to ask you for s parameters
Please when you can, can you kindly post the s parameters to your qsl site for the CPH3910, U310 and 2N3904BU? Please with frequencies up to 1.5 GHZ. Thankssss


Thank you so much Jeremy. God bless you!




Stepping out.. Really enjoying the thread and the hp data Regen has been posting. One nice adjustable crystal filter with transistors

[G0HZU_JMR]

I'm thinking you made a typo. with the output conductance. Yeah?

Thanks, yes I did make a typo. What I was trying to calculate was the internal Ro resistance of the JFET so I could put this in the VCCS model.

I've typed mmho instead of umho for the units. Sorry about that. The internal Ro resistance for the MMBFJ310 is usually just over 10k ohm at 10mA Id so luckily, the calculated value I put into the VCCS model was OK for Ro despite my typo. I find that it's really easy to get in a muddle with mho, mmho and umho. The datasheets often use mmho on one chart and umho on another so it's easy for me to get in a muddle with admittance.

An inductor at the base or capacitor at the emitter generates negative resistance... It can be proved through beta transform. Dennis Feucht shows this in his nice book (handbook of analog circuit design).
The first attached image is a picture that captures the basic ones.
But please show us why, I think you'll use s-parameters or ....

For me the most intuitive way to understand this stuff is to temporarily abandon all equations and s/y/h parameters and just think in terms of how current can lead voltage (and vice-versa) in reactive feedback paths. Then look at the dominant internal feedback capacitance of the device. Assume a purely real source impedance feeding the base, and then trace the feedback path back through the reactance at the emitter and through to the base/source (via the dominant feedback path) and see if this produces a waveform in-phase (can lead to negative resistance at the input) or anti-phase (can lower the input resistance). Putting a capacitive load at the emitter of an emitter follower will usually cause negative resistance at RF frequencies if you trace the signal back to the input. Having inductance at the emitter does the opposite because voltage leads current. ELI the ICE man is one way to remember the phase relationships.

I did manage to find my CHP3910 common gate JFET LNA for the VHF FM band but it's probably best to stick to dual gate mosfet stuff from now on because this is what regenfreak is planning to use in the tuner front end.

[G0HZU_JMR]

One thing to be wary of when testing your dual gate mosfet mixer will be the amount of noise on the LO carrier 10.7MHz away. This will be at the tuned RF frequency and the image. Also, there would be wideband noise down as far as 10.7MHz.

I've not examined that many synthesisers that get used for the LO for a dual gate mosfet mixer, but I have seen designs that use a VCO at the fundamental VCO frequency and there is often a tuned LO amp. This helps to filter away the unwanted noise. A diode ring mixer is double balanced so this issue is less of a problem with a diode ring mixer. The port to port isolation of the mixer will be much higher with the diode ring mixer so the noise can't migrate from port to port as easily.

Some lab sig gens will have fairly high noise floor at a 10.7MHz offset from the carrier. By contrast, a well designed VCO based LO could be 30dB cleaner at this offset. In other words, if you were to use a typical lab sig gen for your mixer LO and you didn't filter it with a narrow BPF then you could think that your mixer has a much higher noise figure than it really has. I'd expect to see a noise figure of about 7dB to 10dB with a typical mosfet mixer design assuming there are no carrier noise problems with the LO.

The conversion gain could be anything from 10dB to maybe 16dB depending of the mosfet type used. The output TOI of the mixer could be anywhere from +10dBm to about +17dBm but a lot depends on how much you optimise the LO drive level and the bias point of the mixer. I think it's reasonable to expect a +12dBm TOI at the output of the mosfet mixer.