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Old 22nd Jan 2020, 8:12 pm   #1
SiriusHardware
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Default 10MHZ to 4MHz with standard logic?

Can anyone suggest a nice simple circuit to divide a 10MHz clock down to 4MHz using as few standard logic ICs / gates as possible? I've been using microcontrollers for so long that I have almost lost the ability to think in standard logic nowadays.

The 4MHz output would ideally be a 50/50 square wave but it doesn't absolutely have to be - it can be short low pulses or short high pulses if that's the easiest way to go.

Even I remember how to build an independent 4MHz oscillator using a few gates and a crystal, but the problem is that the 10MHz and 4Mhz oscillators need to have a synchronised relationship rather than be independently free running.
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Old 22nd Jan 2020, 9:41 pm   #2
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Default Re: 10MHZ to 4MHz with standard logic?

Make the 10MHz 20MHz by making pulses on each transition then divide by 5. Pulses created by an XOR gate with one input delayed a bit with an RC or a few gates in series (there will be 3 left over in a chip). Divide by 5 comes in most decade counters.
 
Old 22nd Jan 2020, 9:48 pm   #3
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Default Re: 10MHZ to 4MHz with standard logic?

Never thought of that, but is (2 * 10Mhz) = 20MHz input acceptable for typical TTL / CMOS counters running at 5V? (Sorry, I should have included the supply voltage in the original post).

The reason I ask is that supply volts appears to make quite a bit of difference to maximum operating frequency.
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Old 22nd Jan 2020, 9:50 pm   #4
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Default Re: 10MHZ to 4MHz with standard logic?

You may be able to do something with the 7490/7492/7493-style ICs - the Schottky-variants (74S) is quite fast.
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Old 22nd Jan 2020, 10:36 pm   #5
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Default Re: 10MHZ to 4MHz with standard logic?

Quote:
Originally Posted by merlinmaxwell View Post
Make the 10MHz 20MHz by making pulses on each transition then divide by 5. Pulses created by an XOR gate with one input delayed a bit with an RC or a few gates in series (there will be 3 left over in a chip). Divide by 5 comes in most decade counters.
If you have a 4MHz pulse train you can turn that into a square wave by triggering a 1/8 microsecond monostable
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Old 22nd Jan 2020, 10:37 pm   #6
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Default Re: 10MHZ to 4MHz with standard logic?

Quote:
but is (2 * 10Mhz) = 20MHz input acceptable for typical TTL / CMOS
Build with sockets and "chip roll"*.

*what audiophools do with valves!
 
Old 22nd Jan 2020, 10:47 pm   #7
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Default Re: 10MHZ to 4MHz with standard logic?

After a little bit of cutting and pasting different elements from various diagrams found on the net into Paint (...I really must get a circuit drawing package) I have this, attached.

(Power connections and XOR gate pin numbers omitted for brevity)
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Old 22nd Jan 2020, 11:01 pm   #8
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Default Re: 10MHZ to 4MHz with standard logic?

Just use 74HC series logic. It's cheap, current and quite fast enough. Saves you having to get an audiophile in to listen to your dividers as you chip roll them :-0

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Old 22nd Jan 2020, 11:03 pm   #9
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Default Re: 10MHZ to 4MHz with standard logic?

XORs give a zero when both inputs are the same as in your diagram, one should be at a static logic level. Mind you it may work if the chip has different "lengths" of logic inside.
 
Old 22nd Jan 2020, 11:08 pm   #10
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Default Re: 10MHZ to 4MHz with standard logic?

Quote:
Originally Posted by SiriusHardware View Post
Never thought of that, but is (2 * 10Mhz) = 20MHz input acceptable for typical TTL / CMOS counters running at 5V? (Sorry, I should have included the supply voltage in the original post).

The reason I ask is that supply volts appears to make quite a bit of difference to maximum operating frequency.



Why not divide by 5 and then do the doubling?
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Old 22nd Jan 2020, 11:44 pm   #11
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Default Re: 10MHZ to 4MHz with standard logic?

Re: The way I connected the XOR gates: DUH. Yes, of course.

Dave, the 4MHz output ideally needs to have a definite 'pulse shape', unlike the razor thin spikes which will be coming out of the doubler.
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Old 22nd Jan 2020, 11:50 pm   #12
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Default Re: 10MHZ to 4MHz with standard logic?

To get equal mark/space, finish with a divide by two.
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Old 23rd Jan 2020, 12:07 am   #13
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Question Re: 10MHZ to 4MHz with standard logic?

Binary rate multiplier, such as the HFC4049B?

Al.
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Old 23rd Jan 2020, 12:17 am   #14
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Default Re: 10MHZ to 4MHz with standard logic?

Explain? As far as I know the 4049 is a hex inverter / level converter?
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Old 23rd Jan 2020, 2:26 pm   #15
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Default Re: 10MHZ to 4MHz with standard logic?

I had a similar problem a few years ago and tackled it thus, although my frequencies were different:

Divide 10 MHz by 10 to give 1 MHz (used a 74HC4017 for this)
Apply the 1 MHz as a reference sig to a HC4046 PLL running at 4 MHz.
Put a divide-by-4 in the VCO to PD pins of the 4046.
It's a bit long-winded but it worked without problems for years.
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Old 23rd Jan 2020, 3:20 pm   #16
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Default Re: 10MHZ to 4MHz with standard logic?

Quote:
Originally Posted by SiriusHardware View Post
Explain? As far as I know the 4049 is a hex inverter / level converter?
HCF4089B Binary Rate Multiplier

SN74167N is a Decade Rate Multiplier that provides an output pulse rate which is the clock-input pulse rate multiplied by 1/10 times the BCD input. For example, when the BCD input is 4, there will be 4 output pulses for every 10 input pulses. This would convert 10MHz to 4MHz.

Inherent in this, and any other standard logic that I can think of, is that the 4 output pulses are not equally space. In this case, the logic simply blocks 6 out of every 10 clock pulses.

If the OP wants a regular 4MHz clock a phase locked loop as suggested by Andy might be best.

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Old 23rd Jan 2020, 3:28 pm   #17
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Default Re: 10MHZ to 4MHz with standard logic?

Here's another approach using a 74HC161 synchronous binary counter:-

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Qa/Qb function as a divide by 3 counter. Count sequence: ...2-3-0-2-3-0....

However, Qc toggles at the 3-0 transition and inverts the 10MHz clock, effectively bringing the next rising edge forward half a cycle. This makes the '0' state half as long, and the division becomes 2.5, hence 4Mhz outputs on Qa and Qb.

Qa has a mark:space of 2:3 and Qb 4:1, Qc is a 2Mhz squarewave.

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Old 23rd Jan 2020, 3:54 pm   #18
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Default Re: 10MHZ to 4MHz with standard logic?

Are there any timing constraints between the 10MHz and 4MHz clocks, eg do their rising (or falling) edges need to be coincident to within a few nS?

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Old 23rd Jan 2020, 4:53 pm   #19
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Default Re: 10MHZ to 4MHz with standard logic?

Quote:
Originally Posted by Skywave View Post
Binary rate multiplier, such as the HFC4049B?
Sorry - a typo! I meant HFC4089B.

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Old 23rd Jan 2020, 7:09 pm   #20
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Default Re: 10MHZ to 4MHz with standard logic?

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Originally Posted by stuarth View Post
Are there any timing constraints between the 10MHz and 4MHz clocks...?
Not especially, they just need to be locked together, or one derived from the other which is the method proposed here.

Obviously with the frequencies being disparate the leading edges of the pulses will not coincide every other pulse, as they would with simple divide-by-2.
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