UK Vintage Radio Repair and Restoration Discussion Forum - View Single Post - Gemini 80-Bus System

john_newcombe · 9th Jul 2019, 5:10 pm

I have now entered and run the code supplied and I can see the reset signals on Pin 9 of IC35 (PROM) and on the /RST pin of the CPU. I guess this gives us some confidence that the PROM is doing its job.

I am not sure how to proceed except that I know that from the time the IVC was working, it displayed the 'IVC Monitor...' message irrespective of the whether the IVC was being used or not (i.e. irrespective of the the setting of pins 6 and 7 on link LKB1 on the CPU board). Perhaps it's time to get back into the ROM code to try and get a clue as to why the message is not being displayed and why the Xtal dot clock is not being selected.

I am also wondering how confident we can be about IC25? I know that its outputs showed signals during the code that looped through accessing the various components, however, this was less than conclusive when the output was explicitly set in code. It seemed as if the CPU needed to be reset multiple times, could that be a red herring?

9th Jul 2019, 5:10 pm	#147
john_newcombe Hexode Join Date: Apr 2019 Location: Skipton, North Yorkshire, UK. Posts: 252	Re: Gemini 80-Bus System I have now entered and run the code supplied and I can see the reset signals on Pin 9 of IC35 (PROM) and on the /RST pin of the CPU. I guess this gives us some confidence that the PROM is doing its job. I am not sure how to proceed except that I know that from the time the IVC was working, it displayed the 'IVC Monitor...' message irrespective of the whether the IVC was being used or not (i.e. irrespective of the the setting of pins 6 and 7 on link LKB1 on the CPU board). Perhaps it's time to get back into the ROM code to try and get a clue as to why the message is not being displayed and why the Xtal dot clock is not being selected. I am also wondering how confident we can be about IC25? I know that its outputs showed signals during the code that looped through accessing the various components, however, this was less than conclusive when the output was explicitly set in code. It seemed as if the CPU needed to be reset multiple times, could that be a red herring?