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What about a 'secondary' winding of a couple of turns around the main inductor, feeding into a Class-A-biased emitter- or source-follower? That gets away from the issue of hooking loads up to high-impedance points associated directly with the electrodes of the active devices.
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Yes, that would be one way as long as the coupling was fairly light. It would also have the benefit of having low harmonics as the resonator waveform should be a fairly good sine wave.
By contrast, I think the second JFET in that oscillator could be running like a switch between Idss and pinch off so it will generate a comb of harmonics at the drain. The other issue is that the Idss will vary from device to device and the JFETS are biased to start up at Idss. I tried simulating the circuit in Microwave Office at work today and it was very fussy with respect to the choice of JFET model even if they were all from the P50 process group. So I think the small signal gain in the startup condition won't be that well defined from device to device. However, I got a very similar phase noise plot to the one I posted up earlier. The JFET model in MWO doesn't seem to account for flicker noise but apart from that the phase noise seemed very similar to my earlier guesstimate.