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Old 20th Mar 2019, 5:53 pm   #140
1100 man
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Join Date: Apr 2016
Location: Ventnor, Isle of Wight, & Great Dunmow, Essex, UK.
Posts: 1,377
Default Re: Hedghog standards converter

Hi Frank,
Thanks for the explanation, that makes things clearer. So it is the LSB that is not doing anything on the video input. I must say there is no effect that I can see on the picture. If I hadn't seen the lack of activity on the scope, I wouldn't know there was a problem!

I will examine (yet again) and test continuity of all the data pins of the FPGA to the socket. They are difficult to see with a powerful lens as the socket gets in the way!

A more minor point is that the test card exhibits quite a bit of vertical judder. Each field looks like it starts a couple of mm vertically away from the last one.

The line timebase in this set is very loud. Unless the line hold is set to just before it goes out of lock, you can hear the LTB rattling away at 50Hz in time to the judder. I assume the line oscillator is being triggered when it doesn't expect it on alternate fields. This set uses direct sync rather then flywheel.

I need to investigate this further.

Thanks for your continued help!

Cheers
Nick
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