[G0HZU_JMR]

Back in my youth long before I had a network analyser I made a similar device for measuring return loss. In my case I wanted to be able to measure passive and active circuits so I designed for a very low level test signal of about -20dBm into the DUT. This required a wideband 50R MMIC amplifier ahead of the detector diodes to boost the signal up into the useful range of the diodes.

I wanted a low test level so I could test the input and output of amplifier stages without driving the amplifier into compression and -20dBm was a good compromise.

However, in your case you have a fully passive setup so it might need to be driven harder.
The first thing I would do is terminate Z2 in 50R and leave Z1 (test port?) as an open circuit.

Then feed in a 10MHz sinewave to the source port and make a chart of detector readings vs drive power level at 10MHz. I suspect that your device will use a very efficient detector diode and there may be an upper drive level before you stress the detector. This will probably be something like 200mW but I would keep it below 10mW to start with as this is probably the most you would be able to drive it with from a typical sig gen anyway.

I'm going to assume there is a single detector diode inside the box and this will rely on you feeding the test port with a reasonably clean sinewave with low harmonics. -40dB for the harmonics would be nice but -30dB will be OK and this is probably what you would see from a typical RF sig gen. If you can fit a 50 ohm 10MHz LPF after the sig gen to clean away the harmonics that would be a good thing for the calibration process below.

With the sig gen at 10MHz and 10mW (10dBm) write down the detector voltage and call this 0dB return loss.

Then step the 10MHz signal down in 1dB (prefer 0.5dB) steps over a 30dB (prefer 40dB) range and write down the detector voltages in 1dB steps down to 30dB. With luck this will be your return loss chart but this assumes the device works the way I expect.

Then repeat with a short circuit at the test port. Hopefully the chart for a short will be virtually the same as the open and there will be no need to write anything down. There may be minor differences but this is OK. However, if it is 'very' different with a short circuit then it may be the case that your RHO circuit is a bit different to what I would expect and all the above will be of limited use and I'll have to think again.

If all goes well then go back to 10mW drive level such that you again get the 0dB voltage at the detector port on a DVM. Then fit a 50R load and hopefully the voltage will fall to zero (off your 30dB chart).

Then fit a 100R resistor as the load and hopefully you will see a detector voltage that corresponds to 9.5dB return loss on your chart and this corresponds to a 2:1 VSWR load.

If you get this result then I think you can now use the device as a return loss bridge across a wide frequency range alongside the return loss chart. You may have to tweak the drive level to get your 0dB calibration with an open circuit each time you change frequency.

If the device really does work like the above then you should now have a calibrated bridge although you may have to be careful you don't overdrive any active (amplifier) stages as this will give false results. You may find you have to use it mainly for passive devices.

Alternatively, set the sig gen down to 0dBm and offset the chart 10dB and you once again have a return loss bridge but with reduced range. It won't be as easy to measure close to 50R with such a low drive level.

It is a very old device but it probably has the potential to be a very useful bridge over a huge frequency range. But to get the best from it you need to use a signal source with low harmonics or the harmonics can introduce significant measurement uncertainty at the detector and this will degrade things way below the full potential of this bridge.

Hope this is useful (and correct!)