Quote:
Originally Posted by ScottishColin
If I POKE 59456,0, PRINT PEEK(59456) repeatedly returns 145.
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145 = 10010001. And so UC5(6522) Port B lines are set to:
PB7 nDAV (In) = High
PB6 nNFRD (In) = Low
PB5 VIDEO ON (In?) = Low
PB4 nCass-2 Motor (Out) = High (So this is not enabled, as this output is active-low
PB3 Cass Write (Out) = Low
PB2 nATN (Out) = Low
PB1 nNFRD (Out) = Low
PB0 nNDAC (In) = High
Therefore, all the pins that are actually configured in DDRB (bits 7:0 set for: In In In
Out Out Out Out In) to be outputs are being set low
except for PB4 (Pin 14) which is not actually getting set low internal to 6522 (Unless the 6522 always uses its read-buffers, even with Data Direction bit set to Output, to measure the actual pin status rather than relying on what internal dataout latch is set to)
- And probably because the Kernal is interrupting between the Poke & Peek. (Only way to tell would be by running some assembly language code to do the Poking and Peeking, with interrupts briefly disabled at the start, before re-enabling them afterwards).
So I do think it's worth measuring voltage on the UC7 Pin 7 (In case there's a bad contact there, and it's staying high)