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Old 6th Oct 2006, 7:12 pm   #1
Kat Manton
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Join Date: Jul 2005
Location: West Yorkshire, UK.
Posts: 1,700
Default FotH TV System - X Modelines

Hi,

I've spent some time studying the open-source version of the nVidia driver to find out how the pixel clock frequency is derived from the 27MHz reference oscillator.

What I've come up with is a little program which simulates this, so allowing me to find pixel clock rates which are possible. This, in conjunction with a spreadsheet bordering on the incomprehensible means a lot of the guesswork's taken out. Modelines I've calculated work as expected.

I've also been playing with the vertical sync timing and found that specifying an odd number of lines gives a something-and-a-half line long sync pulse which seems to keep the timebase of the sets here happier, and I get interlace for once without having built the PLL SPG.

So, here's two modelines for those experimenting with this to play with:

First, a new 405-line one:
Code:
Modeline "664x377i" 8.10  664 680 752 800  377 378 385 405 -hsync -vsync interlace
And, for good measure, the 819-line one I was using with the Sondyna the other day:
Code:
Modeline "1152x738i" 29.3203  1152 1168 1240 1432  738 744 745 819  -hsync -vsync interlace
I'm still playing around with these; among other things I've yet to make my mind up whether I prefer an odd number of active lines or do as is done with 625-line and round it up to an even number (576).

I'll tidy up the /etc/X11/XF86Config-4 file with these and others in and upload it somewhere; that means all you need to do is get KnoppMyth installed and running on a suitable PC, build an RGB combiner, download that X config file and uncomment one line at the top of the file for the standard you want and you're in business.

Regards, Kat
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