Quote:
Originally Posted by Mark1960
With the daver2 test running, which seems to be continuously retrying screen ram test, check for activity on UE9-19 and UE10-19.
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(And original Kernal ROM refitted, for daver2 EPROM that to work in Edit-ROM position)
In particular, need to check that these (connected together, so should give the same reading) both go Low.
As when this
RD signal is high, then UA4 NAND-gate Inverts it to produce
WR (For UE9-1 & UE10-1) - which must have gone low OK for the writing to screen memory via these to work.
Checking that all six 74LS244 Memory Write & Read buffers are actually passing data correctly in read mode is a bit more involved, when they are connected-up to be able to pass data both ways, so need to check
RD input at the same time as Outputs to CPU.
I can't really see why Commodore couldn't have done all of this with just two 74LS245 (Direction-selectable) Tristate buffers, rather than effectively making these from pairs of 74LS244's and then cascading a CPU-side pair with pairs on the Main & Screen RAM's. Seems like a lot more ones to possibly fail!