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Old 13th Jan 2020, 10:33 am   #315
john_newcombe
Hexode
 
Join Date: Apr 2019
Location: Skipton, North Yorkshire, UK.
Posts: 252
Default Re: Gemini 80-Bus System

Quote:
Originally Posted by JohnBHanson View Post
From the 74LS221 data sheet function table read the row that is H L ^ this is the mode that is used. On a rising edge of input B (eg reset button pressed) the output Q goes high for the timing period and then low.

The timing period will be too short for you to observe with a meter - a logic probe with pulse detection of an 'scope or logic analyser is required. So this might actually be functioning despite so be careful.

This is then fed through the 74LS74 D type flip flop which synchronizes reset with M1. This keeps the reset short and means that it does not cause memory loss by interfering with the Z80 refresh cycles.
Thank you for the explanation, I was using a fairly old scope to check for the reset, I may be missing it. I will use my logic probe as it has a pulse capture option.

Quote:
Originally Posted by jncoleman View Post
Before you do anything to that chip, check that you can obtain a replacement. I don't know about that one in particular but a lot of the LS series have been withdrawn. There might be a compatible one, but do check. The '221 is a 'multivibrator' which, once triggered by the input, delivers a short pulse of a duration determined by the external R and C.
I agree, good advice, it would be just like me to race ahead with the snippers! In order to be sure, I will also check that R22 is good now that I know what it is for.

Quote:
Originally Posted by JohnBHanson View Post
A description of the circuit is given in section 1.2 of the hardware manual.

When you get the ***** M-F-B 2 System *****

The system could well be waiting for a boot floppy or the winchester to spin up.

Note also the boot hangs if you don't use the MFB version of the GM849 - possibly with the red LED halt light illuminated.

If you can upon power up without any additional presses of the reset button check the Z80 is producing M1 cycles - eg M1 pin toggles if you can.
I have been testing so far with just the CPU and display card which I think explains the lack of activity after the message. Once I am happy with the reset stuff I will re-assemble the machine. In its assembled state the Xebec is fastened within the top of the card frame with four screws and pretty much prevents access to any of the cards with a probe or whatever, so I need to be sure the CPU is running properly before assembling. I have the rack system of course but being in the top slot of the Galaxy with everything else removed gives the easiest access by far.

Thank you so much for your help guys, really appreciate it, I will keep you posted.

John
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