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Old 7th Jan 2011, 4:33 pm   #42
pitbuell94
Retired Dormant Member
 
Join Date: May 2009
Location: Fresnes, France
Posts: 124
Default Re: 819 line standards convertor.

Hi,

In fact, if I design a large FIFO, I should avoid this problem.

So, I think I put 1 or 2 line more in my design.

I try to use CoreGen, but it's not interesting for me because I want to understand what I do, even If I make mistake and if I spent 1 year to do it.

I see with coregen, a black blox is created with all signal.

I assume it's easier.

When I talk about storing line, in fact, I just store data during active video period => 52µs.

I don't store complete line with synchro pulse and the rest.

I'll add all the missing data later just before the TDA 8702.

I try next monday some code with real component on a board : maybee a barbecu is coming soon

Frederic.
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