[1100 man]

I've just spent the last couple of hours fault finding, and the result? Success!

Checking the 8 bit data lines Y0 - Y7 coming out of the video decoder chip showed activity on all of them. All 8 were still present when checked on the pins of the socket on the FPGA board.

I next checked the data lines coming out of the FPGA going to the 5k6/2k8 resistor network. There are 9 of these (I'm not sure why 9 not 8?).
With the internal test patterns selected, there was activity on all of these lines.

However, with the external input, the lowest one (shown as pin 41 on the circuit) was not doing anything.

My conclusion, therefore, was that the problem was with the input side of the FPGA, so I separated the development board and did some continuity checks between the 8 data pins on the socket and the actual pins of the FPGA. It transpired that there was a short between two of the data lines (119 & 120 on the circuit). There was a whisker of solder between the two pins of the chip!

The video now looks perfect, but strangely there is still no activity on the lowest 5k6 resistor. I would have expected there to be as there is with the internal test patterns. I'm guessing this would be the least significant bit so loss of this may not be that noticeable on the screen?

I would be interested if someone could explain the operation of this part of the circuit.

Dave, thanks for your suggestion, but there is no audio modulator chip fitted yet, so there is no audio carrier to adjust! I imagine the effect on yours would have been wobbly verticals if the audio carrier was too high.

Jac, I checked the video level getting to the decoder chip and it was about 0.8V. The resistors were the correct values.

Next step will be to fit the audio mod chip and get the latest software programmed into the FPGA.

All the best
Nick