[pitbuell94]

Hy,

Thank you very much for your design.

In fact, I'm a newbee concerning VHDL.

This driver it's my firt try.

I'll try your idea.

For me, synchronous or async is a little bit hard.

I need more training.

For my real time converter, I'll use some TDA8703 or TDA8708 as CAN, an LM1881 as synchro separator and finally a TDA8702 as CNA.

Actually , I spent time to design FIFO to store data coming from TDA8708 and add them to the next line and make an average.

Maybee, I'll use an otherway like this to avoid time calculation of average.

Value from TDA 8708 is 8 bits.
Average from 2 line is ((luma line1)+(luma line2))/2 but with this way, in case luma line1 is 0000 1111 and luma line2 is 0001 0000, the result is 0001 1111 or 31 in decimal notation => problem is average give 15.5 who is not possible to code in binary so I want to test this solution.

The end CNA should be an 9 BIT CNA and I keep just the result of a simple 8 bits adder.

In case luma1 is 1111 1111 and luma2 are 1111 1111 end value will be 1 1111 1110 and then I don't lose any value.

Normally today, I'll see Jérôme Halphen.

He is living close to me.

Do you want I give him him "Hello" from you.

Thank again for your design and have a nice day.

Frédéric Cabanes(Pitbuell94).