Thread: Mk14 vdu
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Old 8th Jan 2020, 10:23 pm   #5
SiriusHardware
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Join Date: Aug 2011
Location: Newcastle, Tyne and Wear, UK.
Posts: 11,485
Default Re: Mk14 vdu

Actually, I hadn't thought that through, I'd always just assumed that the uP just went instantly off-bus with any ongoing action held in a static state. It never occurred to me that it might finish whatever it was doing before relinquishing the bus.

The VDU holds _RD low from the left edge of the 'drawable' area to the right edge of the 'drawable' area, which presents a problem for the PIC pretending to be RAM.

The very first "Read address from VDU / get data from that address in PIC RAM / Present data to VDU data bus" cycle is done on detection of the falling edge of _RD, but then the VDU just holds _RD low for the rest of the line, outputs the next address, reads, outputs the next address, reads, and so on until the end of the line where it releases _RD high.

With _RD staying low for the whole of the rest of the line, the PIC instead watches for changes of state of the VDU A0 line in order to know when to do the next read address / get data / offer data cycle.
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