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Old 20th Nov 2022, 12:47 pm   #22
ortek_service
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Join Date: May 2018
Location: Northampton, Northamptonshire, UK.
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Default Re: MK14 SN74S571 PROM Power reduction test

Yes, I recall previously seeing this - Probably when I first discovered these "Compute newsletters" a while ago.
It does seem rather reliant on these PROM's being happy with no power supply, whilst still in-circuit. Many IC's would have got parasitically-powered from the data/address lines etc that could result in latch-up when the power was applied and possibly not working getting rather hot (I once encountered that with PLL IC's, where the supply didn't rise quick enough compared to voltages on input pins, as supply was a simple Shunt zener stabiliser and series R + a few uF's capacitance across the zener caused an RC time-contant delay. So I had to put some resistors in series with the inputs, to restrict the I/P current below that which could cause latch-up)

Many years ago, I heard about a RAM IC that died after a few months use, and they then discovered (Fortunately only on prototypes) its power rail had never been connected (The Mentor CAD system put power-rails as a separate block, that was probably on another sheet, and it seems any DRC warnings were ignored / disabled)
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