UK Vintage Radio Repair and Restoration Discussion Forum - View Single Post

ortek_service · 5th Apr 2021, 4:28 pm

Yes, you could insert an RC delay circuit from /OE line to delay it a bit.

But you would then need a schmitt-trigger buffer, to ensure a fast switch-on of the power-switch, as having it slowly ramping wouldn't be too good for power reduction and reliable operation.
And would also need a diode bypass across the the resistor of the delay circuit, to provide a fast switch off when /OE goes high again.
- Although a set-reset flip-flop might work better for doing this, working faster and avoiding needing peak currents in the delay capacitor.

However this does add quite a bit more complexity to it allfor maybe only slight power savings. And could save even more, if you could get the CPU in a CMOS version - maybe an implementation of it in a modern FPGA (but then rather moving away from originality of it)

5th Apr 2021, 4:28 pm	#4
ortek_service Octode Join Date: May 2018 Location: Northampton, Northamptonshire, UK. Posts: 1,444	Re: MK14 SN74S571 PROM Power reduction test Yes, you could insert an RC delay circuit from /OE line to delay it a bit. But you would then need a schmitt-trigger buffer, to ensure a fast switch-on of the power-switch, as having it slowly ramping wouldn't be too good for power reduction and reliable operation. And would also need a diode bypass across the the resistor of the delay circuit, to provide a fast switch off when /OE goes high again. - Although a set-reset flip-flop might work better for doing this, working faster and avoiding needing peak currents in the delay capacitor. However this does add quite a bit more complexity to it allfor maybe only slight power savings. And could save even more, if you could get the CPU in a CMOS version - maybe an implementation of it in a modern FPGA (but then rather moving away from originality of it)