Quote:
Originally Posted by Karen O
.... filtering to remove the colour sub-carrier requires at least four multiply/accumulates per input pixel. And then the line interpolation will require three multiply/accumulates per output pixel....
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Doing decent digital PAL/NTSC decoding isn't trivial. That's why Darryl, myself and most others who need that capability buy specialised chips to do the job. They are now both good and cheap. I know it's possible to do an even better job than these chips but that's a *lot* of work. Conversely, encoding PAL or NTSC is quite easy in an FPGA, as I have illustrated in my recent article in the BVWS Bulletin. I believe Darryl has also done some nice work using an IIR to implement a sound notch in the FPGA ahead of the vision modulator in the Aurora. This would be far too complex as an FIR.
The actual 625>405 conversion algorithms are almost trivial maths. The hard part, if you're taking a DSP or other CPU based approach, is looking after the timings. Real time means exactly that in TV pictures. Apart from the blanking intervals you can't take a break and catch up later. This is why an FPGA approach works so well. It's easy to make counters and all the other miscellaneous logic, all running in parallel, all amply fast enough.