Interesting solution but I'm not sure you need to go to these lengths to get a flat output from the 9850 DDS chip.
It's about 20 years since I last did anything at work with the AD9850 but there are a few design rules that can indicate the flatness at the raw DDS output pin of the chip. If you adopt the default 10mA Iout and feed this into the default shunt 50R resistor (and then connect your load circuit across this) then the level should be about 88mV rms at low frequencies.
This is because 10mA pkpk is 5mA pk and this is 3.54mA rms. With half of this going into your 50R load and half into the onboard 50R shunt resistance the power into the load will be 0.00177*0.00177*50 = 0.157mW or -8.0dBm.
This should be the level at a low frequency, eg 1MHz. If we assume the DDS is clocked at 125MHz then the amount of droop/rolloff at 39MHz can be predicted in a simple excel spreadsheet because the output should follow a sinx/x response. I've attached a quick and dirty excel sheet below that shows this in a graph of frequency response vs level for a given clock frequency of 125MHz.
In reality, a reconstruction (lowpass) filter will need to be added and this will introduce even more droop at 39MHz but probably only enough to give about 2.2dB total droop at 39MHz. i.e. 1.5dB due to sinx/x and 0.7dB droop due to the LPF. This 2.2dB total droop at 39MHz can be compensated for with a very simple equalisation circuit.
So I'd be tempted to look backwards into your (ebay?) DDS module to see how the lowpass filter has been implemented. From what I can see the majority of these cheapo ebay PCBs adopt the 'clockgen' circuit rather than the 'synth' circuit for the 9850. This looks to be a copy of the 200R elliptic filter used on the clockgen eval board and this is meant to be fed to the onboard comparator to generate a squarewave. But most hams would surely want to use the 'synth' circuit version with a 50R output?
So I'd be tempted to go back to basics and fit the parts that give a raw 50R output and then design a simple 50R LPF and equalisation circuit. Typically this would give out about -11dBm across LF through 40MHz and this would be flat to maybe +/-0.5dB. Then just add a buffer amp and pads as required?
Note that it's 20 years since I last messed with this old DDS chip so the above may contain nuts but I think it is about right
