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Old 6th Sep 2010, 2:49 pm   #6
ppppenguin
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Join Date: Dec 2003
Location: North London, UK.
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Default Re: Mixed sync (and blanking) from separate H/V sync

Because the raw HV pulse timings are adjustable it is possible to generate proper sync and blanking using only +ve delays. This means (and I'll wash my mouth out with soap for saying it) you can do it with just gates and monostables.

Otherwise, the decent way of doing it is to lock a suitable clock to the H pulses. A HC(T)4046 (preferably Philips brand) is good enough for the job and I would suggest 5MHz as a compromise between absolute accuracy and ease of use. The rest is just divider chains, gates and flipflops. Most easily done in a PLD but CMOS/TTL will both work. Software folk might use a PIC but that's not my sort of thing.

PS: There are some tricks to getting the best out of a 4046 PLL. Will publish them if you wish. Many other frequencies are possible. Just look at the timings needed (2.35us, 4.7us and 12us) and see if there's a better frequency for the oscillator. At 5MHz 4.7us would become 4.8us which doesn't matter at all for this application.
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