[ppppenguin]

There is an important app note from Xilinx that says very strongly: "Don't use global async reset". It may be useful for simulation but it's a very bad idea for synthesis. I try not to use async logic at all. The only time I deliberately use async reset is in the classic pulse synchroniser that uses 2 flipflops.

-- 1st half of synchroniser
process (INPUT_REQUEST , GRANT) begin
if GRANT = '1' then PRE_REQUEST <= '0';
elsif rising_edge(INPUT_REQUEST ) then
PRE_REQUEST <= '1';
end if;
end if; -- INPUT_REQUEST/GRANT
end process;

process (CKMAIN) begin
if rising_edge(CKMAIN) then
REQUEST <= PRE_REQUEST; -- 2nd half of synchroniser.
end if; -- CKMAIN
end process;