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SiriusHardware · 30th Jun 2019, 7:34 pm

Certainly will, rather nicer than having to scrabble for my threadbare piece of paper which describes the upper rear edge connector, and of course especially helpful to have the rear lower side connections labelled since your PCB is unique in having those already routed so there is no existing documentation which describes those connections.

I don't know whether SOC would have ever have gone so far as to implement memory paging as suggested by Tim / tried by Tony, but they might and ought to have got to the point where the bus connections were all available at the edge connector (they did, after all, do this on the ZX80 onwards from the very start). They should have done it on the MK14 on the first issue which had contact fingers for the lower side of the rear edge connector, whichever issue that was.

If they'd done that (and with the unwanted PROM images already removed from issue V onwards) they could have introduced a 'RAM pack' PCB which plugged into the rear edge connector in the best tradition of Sinclair machines going forwards from that point, perhaps with an ongoing connector on its own rear edge, appropriately pinned out for the VDU via a DIN connector of the same type which the VDU was obviously laid out for. (Your third or fourth next project, perhaps...)

Incidentally the same forum member who confirmed that the issue V did have those unwanted PROM images removed 'out of the box' also told me that there are still multiple images of the RAM I/O and display in the issue V memory map, so he then further modified his issue V machine to remove those images as well. I invited him to post details of the mods (in the area of IC15 through to IC17 on issue V PCBs) to one of these threads but I think he prefers to remain a read-only member.

30th Jun 2019, 7:34 pm	#210
SiriusHardware Dekatron Join Date: Aug 2011 Location: Newcastle, Tyne and Wear, UK. Posts: 11,575	Re: MK14 schematic revisions Certainly will, rather nicer than having to scrabble for my threadbare piece of paper which describes the upper rear edge connector, and of course especially helpful to have the rear lower side connections labelled since your PCB is unique in having those already routed so there is no existing documentation which describes those connections. I don't know whether SOC would have ever have gone so far as to implement memory paging as suggested by Tim / tried by Tony, but they might and ought to have got to the point where the bus connections were all available at the edge connector (they did, after all, do this on the ZX80 onwards from the very start). They should have done it on the MK14 on the first issue which had contact fingers for the lower side of the rear edge connector, whichever issue that was. If they'd done that (and with the unwanted PROM images already removed from issue V onwards) they could have introduced a 'RAM pack' PCB which plugged into the rear edge connector in the best tradition of Sinclair machines going forwards from that point, perhaps with an ongoing connector on its own rear edge, appropriately pinned out for the VDU via a DIN connector of the same type which the VDU was obviously laid out for. (Your third or fourth next project, perhaps...) Incidentally the same forum member who confirmed that the issue V did have those unwanted PROM images removed 'out of the box' also told me that there are still multiple images of the RAM I/O and display in the issue V memory map, so he then further modified his issue V machine to remove those images as well. I invited him to post details of the mods (in the area of IC15 through to IC17 on issue V PCBs) to one of these threads but I think he prefers to remain a read-only member.