[G0HZU_JMR]

The circuit values in your lowpass filter do look a bit odd and I'd expect a poor response from that filter, especially at 39MHz.

Maybe there were typo errors in the original circuit? To get a fairly flat response up to 40MHz from an AD9850 clocked at 125MHz should be quite easy if a simple LPF is followed by a lossy equaliser circuit. The output signal level should be quite predictable and it should be fairly easy to get within +/- 0.5dB flatness across 0-40MHz. The equaliser circuit would cost maybe 3dB in output level so the DDS would typically output -11dBm when flattened by the LPF and equaliser. This could then be followed by something like your MAR amplifier to boost the level as required.

I can show you how to design all this if it helps? The sinx/x plot in the excel sheet can also help predict the level of the unwanted alias term when the output is set to 39MHz. This is because all the major terms from the DDS DAC will follow this sinx/x envelope shape.

For example, at 39MHz Fout the main (unwanted) image will be at 125-39 = 86MHz. The excel spreadsheet shows that 86MHz will have about 8.3dB droop wrt 1MHz.

But there is already 1.5dB droop at 39MHz so the relative level of the 86MHz term to the 39MHz term will be just 8.3-1.5 = 6.8dB.

So to get 60dB rejection of the 86MHz term the LPF would need to provide 60-6.8 = 53.2dB rejection when designed. Note that there will be other spurious terms from the DDS such as 125MHz - (2*RF). Therefore, at 39MHz there will be a spurious term that will be at 125-39-39 = 47MHz. This will be harder to filter out and this term could easily be in the order of -50dBc. The AD9850 isn't a very clean DDS so there will also be a carpet of spurious terms down at maybe -70dBc and these can be seen in the datasheet plots.


I think a suitable LPF + equaliser design could be fitted to your existing DDS board or maybe you could use this info for a future DDS board? eg for a test signal generator that needs to be flat across 0-40MHz for example.