I am trying to work out how to use the I/O chips at the moment for the manual
I think the Clock signal will need to be connected to R/W - the clock is edge triggered on a Low to High but, that should be fine as it will trigger on the way out of either a Read or Write cycle. I am going to wire up one on my veroboard to prove this as it would mean we need a PCB link - if we are clever then I think we can get the Normally Low but going high on Read or Write from the output on Pin 3 of IC11 and it can be reached with a route. Joining R/W on the RAM and those pins would be a problem.
This will allow you to remove the extra two pads that are not on the original PCB...
I would appreciate someone else taking a look at my thinking... I will try today I hope though.
