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Jon_G4MDC · 12th Aug 2019, 9:38 am

After thinking a little more - that group of 5 frequencies which are in error is very odd.
In BCD code which is being applied to the divider there is no run of 5 "1"s together or 5 "0"s.

If a group of 4 consecutive frequencies were in error we would have a theory - bit C0 is stuck low. 145.524 to 145.527 giving 145.520 would be explained.

It is all undone by 145.528 giving 145.520 yet 145.529 is correct...very strange!

12th Aug 2019, 9:38 am	#15
Jon_G4MDC Nonode Join Date: Nov 2015 Location: Welwyn Garden City, Hertfordshire, UK. Posts: 2,015	Re: Yaesu FT480R After thinking a little more - that group of 5 frequencies which are in error is very odd. In BCD code which is being applied to the divider there is no run of 5 "1"s together or 5 "0"s. If a group of 4 consecutive frequencies were in error we would have a theory - bit C0 is stuck low. 145.524 to 145.527 giving 145.520 would be explained. It is all undone by 145.528 giving 145.520 yet 145.529 is correct...very strange! Last edited by Jon_G4MDC; 12th Aug 2019 at 10:06 am.