Quote:
Originally Posted by Mark1960
Quote:
Originally Posted by Timbucus
I am currently working out why he used such a resistor network for the 555 it does not lead to the 1Hz in Step 12 he says and we have produced. I also cannot work out why there is a pullup on the 555 Pin 3 -> Clock input on the 74C74 it is not needed as far as I can see.
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I think the high level output voltage of the 555 with 5v supply does not meet the minimum high level input voltage of a cmos input. Typical is only 3.3v, but minimum is 2.75v
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Thanks Marc yes obvious duhh - as I have used only the LS versions I never suffered. I will get some 74C74 and test (and let people know in the notes) - this will need a resistor on the back of the board to correct - which is OK as the original did but, for the D pullup. Thanks for that.
For those following he also used the upper section of the 7474 so it is Pin 11 that is connected to Pin 3 on the 555 not 3 as on ours.
The slight change that r1 in the astable (provided by R5 at 47K) makes is to lengthen the Ton to 3.6ms from 0.65ms with Toff remaining at 0.32ms which means the Slow step frequency remains around 1Hz. I will swap one of mine out and prove it still works or what if any impact it has on the single step especially. On our board that means swapping R4 for a 47K.