I've been looking at designing a memory add on for my "rev 5.5" MK14 using a 6116 type 2k x 8 SRAM chip. These have the advantage that they interface directly to the signals on the SC/MP since OE = NRDS and WE = NWDS, you just need to generate a /CE signal for the RAM chip.
If you just want to add 1.5k after the PROM from 200-7FF then the CE decode is pretty simple:
Note: X = NRDS&NWDS
Code:
Truth Table
X. A11 A10 A9 A8 /CE
00 0. 0. 0. 0. 0. 1
01 0. 0. 0. 0. 1 1
02 0. 0. 0. 1. 0. 0
03 0. 0. 0. 1. 1. 0
04 0. 0. 1. 0. 0. 0
05 0. 0. 1. 0. 1. 0
06 0. 0. 1. 1. 0. 0
07 0. 0. 1. 1. 1. 0
08 0. 1. 0. 0. 0. 1
09 0. 1. 0. 0. 1. 1
10 0. 1. 0. 1. 0. 1
11 0. 1. 0. 1. 1. 1
12 0. 1. 1. 0. 0. 1
13 0. 1. 1. 0. 1. 1
14 0. 1. 1. 1. 0. 1
15 0. 1. 1. 1. 1. 1
16 1. 0. 0. 0. 0. 1
17 1. 0. 0. 0. 1. 1
18 1. 0. 0. 1. 0. 1
19 1. 0. 0. 1. 1. 1
20 1. 0. 1. 0. 0. 1
21 1. 0. 1. 0. 1. 1
22 1. 0. 1. 1. 0. 1
23 1. 0. 1. 1. 1. 1
24 1. 1. 0. 0. 0. 1
25 1. 1. 0. 0. 1. 1
26 1. 1. 0. 1. 0. 1
27 1. 1. 0. 1. 1. 1
28 1. 1. 1. 0. 0. 1
29 1. 1. 1. 0. 1. 1
30 1. 1. 1. 1. 0. 1
31 1. 1. 1. 1. 1. 1
/CE = NRDS&NWDS + A11 + /A10&/A9
MA10..0 = A10..0
(MA10..0 are the 11 address lines on the memory chip)
Its more complicated if we want to use the 0.5k "hidden" by the PROM to map to the standard and extended RAM on the main board, allowing the MK14 to be used with easy to get 6116 chips rather than the 2111 chips that when available are expensive. Leaving them off the board is sufficient since the decoding on the board doesnt affect any memory off-board.
Note: X = NRDS&NWDS
Code:
Truth Table
X. A11 A10 A9 A8 /CE
00 0. 0. 0. 0. 0. 1
01 0. 0. 0. 0. 1 1
02 0. 0. 0. 1. 0. 0
03 0. 0. 0. 1. 1. 0
04 0. 0. 1. 0. 0. 0
05 0. 0. 1. 0. 1. 0
06 0. 0. 1. 1. 0. 0
07 0. 0. 1. 1. 1. 0
08 0. 1. 0. 0. 0. 1
09 0. 1. 0. 0. 1. 1
10 0. 1. 0. 1. 0. 1
11 0. 1. 0. 1. 1. 0
12 0. 1. 1. 0. 0. 1
13 0. 1. 1. 0. 1. 1
14 0. 1. 1. 1. 0. 1
15 0. 1. 1. 1. 1. 0
16 1. 0. 0. 0. 0. 1
17 1. 0. 0. 0. 1. 1
18 1. 0. 0. 1. 0. 1
19 1. 0. 0. 1. 1. 1
20 1. 0. 1. 0. 0. 1
21 1. 0. 1. 0. 1. 1
22 1. 0. 1. 1. 0. 1
23 1. 0. 1. 1. 1. 1
24 1. 1. 0. 0. 0. 1
25 1. 1. 0. 0. 1. 1
26 1. 1. 0. 1. 0. 1
27 1. 1. 0. 1. 1. 1
28 1. 1. 1. 0. 0. 1
29 1. 1. 1. 0. 1. 1
30 1. 1. 1. 1. 0. 1
31 1. 1. 1. 1. 1. 1
/CE = NRDS&NWDS + /A10&/A9 + A11&/A9 + A11&/A8
MA10 = /A11&A10
MA9 = /A11&A9
MA8 = /A11&A8 + A10&A8
MA7..0 = A7..0
Note the top 3 bits of the RAM address are "rewritten" to move them to the expected Bxx and Fxx addresses.
This is obviously a fairly complex logic circuit a sketch of which is attached.
According to suggestions from Sirius another thread I invisage putting the memory expansion on a board with signal buffering and a couple of DIN 41612 a+b connectors to allow other boards like the VDU to be plugged in. if this wasnt required the not fitting them would be the answer
I would also put on a voltage regulator supplied from the raw 8v input on the MK14 as the 5v on the MK14 is already stressed enough!
Another possibility that was suggested was to allow an EPROM to be fittef to the RAM socket since the pin allocations are similar to the 2716 allowing custom firmware to be tried. Presumably this would map from 000 to 7FF. The various option links would pretty much require the use of a PROM or GAL unless we want the challenge of a board full of TTL!