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Old 9th Aug 2018, 1:56 pm   #48
kazzawozza
Retired Dormant Member
 
Join Date: Aug 2018
Location: Llandudno, Conwy, Wales, UK.
Posts: 5
Default Re: Tesla MH74S571 programming.

Indeed. If there were some documented software to go with that circuit diagram, I'd be minded to try to adapt it to the MH74S571, but as it is one may as well start from scratch.

Thinking out how the innards work, it seems that the MH's fuses are blown between the VCC's 10.5V and the individual data pins. If they're held high at 5V, that's only 5.5V difference and within tolerance, but if they're held low then that's a 10.5V difference, enough to blow the fuse. At least that's how I've reasoned it out in my head. From what I can see the programming pulse is applied to the output gate pin.

My google-assisted translation of the programming instructions is:
  1. At first, the word is selected by adding the appropriate voltage combination to the ADDRESS A* inputs whose memory cells (bits) are programmed. The address of the word is dialed when U0 is unplugged (see definition of time series generator). The specific values of Uih and Uil for address selection are given by the recommended programming conditions.
  2. Then the output associated with the bit to be programmed will connect to Uo. The timing of this connection, as well as the disconnection with respect to the time runs on the outputs of the programming generator G, is denoted in the generators' time definitions.
  3. The remaining (not programmed) outputs are connected via the resistor R to the voltage Uz. Recommended values Uz, Uo, and R are listed in the recommended workplan for programming.
  4. The actual programming is done of the selected bit using the impulse from the programming generator G.
  5. Additionally, the correctness of programing the selected bit is usually performed. If programming is correct (burning of the programming clutch), the output of the selected (and programmed) bit in the state of level H is appropriate. This state is characterized by the Uoh parameter, the boundary of which is given in the characteristic data.
  6. If programming has not been done, the programming procedure according to previous paragraphs 3 and 4 is repeated again with a typical value of the programming pulse width X. If programming still has not been done, the programming procedure according to points 3 and 4 is repeated, but with the maximum width value pulse X.
  7. Only one bit of the selected word can be programmed at a time.

According to the timing diagram, blowing a bit is done as follows:
  • Raise VCC to 5V
  • When VCC is stable, raise S (or /G in DM parlance) to to a logic high level (2.4~5.0V)
  • No less than 10us later, start raising VCC to 10.5V. This should typically be done in 100us.
  • Within 10~1000us of VCC reaching this level, S is dropped to 0V for a programming pulse of between 1 and 20 ms.
  • When S is raised back up again, VCC should start dropping typically within 10~1000us, returning to 5V 100us later (typically).
  • S should not be dropped to 0V less than 10us after VCC has reached 5V. VCC can then also be dropped to 0V.
  • A cool-off period of 3~4 times the programming pulse is required before the next programming cycle.

Does that match other people's interpretations?

I'm unclear on what the V10 and V20 in the 'G' element of the right-hand diagram on page 143 refer to. Does anybody else have an idea?
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