[PETERg0rsq]

Keith

many thanks for your offer.

I have ordered a couple from china, but with a long lead time, and there are some local ones up for sale shortly.

Managed to sort out my logic analyser problems, somewhere along the line I reset the clock data, and it went into clocking only on rising edge, not both! User error!

Got a little time today, and pulled all the chips connected to the bus except the two EPROMs which get addressed exclusively on the initialization.

Got exactly the same results, so the other chips are not causing the problem.

I wrote new EPROMS, but again no change.

I then compared what the 6802 address bus was addressing, and the returned data values, by comparing with my readout of the EPROMS, and the 6802 is receiving the data it is requesting, so that eliminates any reading problems.

The fault occurs straight after the FFFF, FFFE sequence, and the received data for these addresses is identical when boots successfully, or not. Straight after this the Most significant two bytes are corrupted to FF, which is all bits ON (which coincidentally are the same as in the start addresses!)

The DATA lines are correct for the sent ADDRESS lines

As my logic analyser is directly on the 6802 pins, before any buffers or pull ups on the ADDRESS lines, I can only conclude the fault is in the 6802.

Can anyone argue against this?

If not I will put it away untill my new 6802's arrive.

Peter