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Old 7th Mar 2024, 2:31 am   #21
ortek_service
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Default Re: MGH8060 full-house SC/MP - support thread

Quote:
Originally Posted by Phil__G View Post
You dont have the 'mode set' flag set Owen (mode definition word bit 7), so it wont go into 'output' mode.
Try:
10 LET @#A003=#80
20 LET @#A000=1
Thanks, Phil, for that. I don't know how I originally had it working via Kitbug, as I'm sure I'd put '00' into $A003, unless I'd mistyped!
And I later found I couldn't get it to work again via Kitbug either, when putting '00' into $A003.

I think it's been 35years since I last directly prog'd 8255 registers (on my Beeb EPROM Programmer design, that I'd used a couple of 8255's on). So I'd assumed it was like most 16bit PIA's like the 6821 etc. and I'd just put all zeroes into the Data Direction Register. after taking a quick look to find the address of that and port A in this version of the datasheet: http://aturing.umcs.maine.edu/~meado...Intel8255A.pdf

Of course the 8255, having 3 ports, is slightly different in that there isn't just 2 data and 2 DDR registers, but it had looked like just making the control register all zeros put it into standard Mode0 with all pins as outputs.
And I hadn't spotted that the highest-bit 'Mode Set Flag' wasn't just something you read (as 'flags' normally are), but that you had to set it
- As there doesn't seem to be much written about it in that datasheet, and you have to refer to all the examples on the following pages to see that you always set it to '1' (which makes you wonder why it's really there for?).

Anyway, now I could actually control the LED from NIBL, I went back to writing a small program to flash it. I hadn't been able to find a 'Delay' command in the NIBL Reference guide, so just used a for loop (I originally used count to 1000, but that was surprisingly very-slow, with count to 100 taking about 2 secs):

10 LET @#A003=#80
20 LET @#A000=1
30 FOR I=1 TO 100
40 NEXT I
50 LET @#A000=0
60 FOR I=1 TO 100
70 NEXT I
80 GOTO 20

- It would be neater / shorter if NIBL has a complement / Ex-OR function and also a delay function.

But co-incidentally, I then spotted your post a bit earlier about your NIBL extensions now including a delay function (Although will presumably need to update the 'FULL' v270224 EPROM's $8200-$87FF area with your latest version, to include that.
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Old 7th Mar 2024, 2:59 am   #22
Phil__G
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Default Re: MGH8060 full-house SC/MP - support thread

Quote:
Originally Posted by ortek_service View Post
(Although will presumably need to update the 'FULL' v270224 EPROM's $8200-$87FF area with your latest version, to include that.
It should already be part of the image Owen, if you examine memory at 8200h you should see valid code, if not it will be all FF.

Heres a 3.5 second delay for example:

Z=35:LINK#824D

Cheers
Phil
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Old 7th Mar 2024, 11:00 am   #23
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Default Re: MGH8060 full-house SC/MP - support thread

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Originally Posted by Phil__G View Post
Quote:
Originally Posted by ortek_service View Post
(Although will presumably need to update the 'FULL' v270224 EPROM's $8200-$87FF area with your latest version, to include that.
It should already be part of the image Owen, if you examine memory at 8200h you should see valid code, if not it will be all FF.

Heres a 3.5 second delay for example:

Z=35:LINK#824D

Cheers
Phil

Thanks. Yes, I had previously tried calling some of the routines there.

It was the delay one that I'd thought was a new one, after seeing it mentioned in your recent post about it in NIBL helper routines: https://www.vintage-radio.net/forum/...06&postcount=5
But just re-reading this, I now see it was support for the 9600 receipt printer that's just been added (which could be useful for me to add, as I was considering getting one of these).

And I've just noticed that the delay routine at #824D was actually listed in the '27C256 (Actually needs to be 27C512 for this?) Software Load' summary at the end of Realtime's MGH8060 GAL Mod pdf - Where it correctly states that this is in tenths of seconds.
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Old 8th Mar 2024, 4:01 pm   #24
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Default Re: MGH8060 full-house SC/MP - support thread

Quote:
Originally Posted by ortek_service View Post
And I've just noticed that the delay routine at #824D was actually listed in the '27C256 (Actually needs to be 27C512 for this?) Software Load' summary at the end of Realtime's MGH8060 GAL Mod pdf - Where it correctly states that this is in tenths of seconds.
Yes Owen, you're absolutely right - that should be 27C512. I'll update the doc and re-post once Phil has published the NIBL Receipt Printer routines (so I can include a reference in the table and a web link)
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Old 22nd Mar 2024, 1:02 pm   #25
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Default Re: MGH8060 full-house SC/MP - support thread

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Quote:
Originally Posted by ortek_service View Post
And I've just noticed that the delay routine at #824D was actually listed in the '27C256 (Actually needs to be 27C512 for this?) Software Load' summary at the end of Realtime's MGH8060 GAL Mod pdf - Where it correctly states that this is in tenths of seconds.
Yes Owen, you're absolutely right - that should be 27C512. I'll update the doc and re-post once Phil has published the NIBL Receipt Printer routines (so I can include a reference in the table and a web link)
I've also just noticed, on the GAL16V8 outputs, that they are called /nRAM, /nROM & /nIO. So assuming that '/' is used to indicate an inversion as it often is (and it doesn't signify an output pin in GAL equations), then also having 'n' after this / before the name would imply double-inversion - so back to just (active-high) RAM, ROM, IO?

I was looking at this again, to see if I could add the D-FLG from D6 etc as on the new MGH8060GAL version using the GAL22V10, by re-jigging some pins around to free up an output-capable or two.
And I've just noticed it seems I actually missed cutting the existing track to pin11 of the GAL16V8 and grounded that (as I'd only printed off a small picture of the mod-wires and that one was just a very-thin bit of wire)
But it had seemed to still work OK, without doing that! So must have been some luck in the timing of ADS (inverted nADS) going to the GAL nOE input.
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Old 22nd Mar 2024, 4:16 pm   #26
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Default Re: MGH8060 full-house SC/MP - support thread

If the data lines are being stored with an edge triggered register then you can trigger on either the falling or rising edge of NADS, provided you are not overclocking the 8060.

If you overclock the 8060 to 8MHz then you need to trigger on the rising edge or use a transparent latch, with active low enable. I don’t know what frequency this becomes required.

If you try 8MHZ then double the baud rate.
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Old 23rd Mar 2024, 6:06 am   #27
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Default Re: MGH8060 full-house SC/MP - support thread

Copied from my post (#4) in this thread on the mnew MGH8060GAL version:
https://www.vintage-radio.net/forum/...52#post1628452

Quote:
Originally Posted by ortek_service View Post
>>
>>
And I also thought it may be possible to add this D-FLG, latched from D6 (as well as H-FLG, latched from D7 - if that's also useful?) to the previous MGH8060 mod-ed with GAL16V8 version.

Unfortunately, the GAL16V8 on that doesn't have any more Output-capable pins free (being only a 20pin device rather than the 24pin GAL22V10 now being used here).
However, there are 4 unused GAL16V8 Input pins on that, that are free (once isolated from ground), and I think that if A11 (wire linked to pin12) to one of these inputs, then that would free-up an I/O pin to use as an output.
One of the A12 to A15 lines could also be moved, although that would involve a bit-more track-cutting and wire linking, to support H-FLG as well.
It will of course involve a few slight changes to the GAL equations, but doesn't look too difficult and I may give it a go.

I'm also thinking of making one of the serial headers on that, an Aux Serial one, for use with the receipt printer etc. It looks like this can be done by just cutting existing TX and RX_USB from pins 2 & 3, then re-patching SOUT & SIN to these.

Owen
Well after investigating this further, I found only small track-cuts were required on U4 (74LS573 now a GAL16V8's) grounded unused inputs (luckily just on the easily-accessible underside), to free these for use.
So I did that and wire-linked the following (which routed quite well, without any wires crossing over each other)
U4 Pin 9 ('D7' on original schematic) to INS8060 D7 (Pin 9)
U4 Pin 8 ('D6' on original schematic) to INS8060 D7 (Pin 10)
U4 Pin 7 ('D5' on original schematic) to INS8060 A11
(Moving A11 from previous pin 12 on GAL, to free-up this I/O pin)
U4 Pin 6 ('D4' on original schematic) to INS8060 A10
(To allow finer 1kB segment granularity in Memory-map - as on MGH8060GAL)

However, with the GAL16V8 only having 8 output-capable pins, and 3 chip select outputs plus 4 upper address-line outputs (A12 to A15 - that I'd previously forgot were actually outputs from this, not inputs! as they are derived from D0..D3 inputs), then there's only a single free output to use for either D-Flag or H-Flag etc.
And even though it seems it's possible to remove the nOE dedicated pin (that other, larger GAL's don't have as it seems you can assign most pins for this on those, if required), by using 'Complex' mode on the GAL16V8, then that's still only an Input-pin in alternate function.

So now just need to hack the equations and try re-compiling these (with WinCUPL / PALASM?).

However, I thought it would be nice to have the capability of more outputs, and I have discovered the not so common GAL18V10, in the same DIL20 package but with two more In/Out pins (and crucially no semi-permanent nOE pin to have to ground). I have found that these are available on Aliexpress and 'Lake store' that I've often used with no issues have them quite cheap (compared to eBay prices even from China)

Unfortunately, I have read that the TL866 doesn't support the GAL18V10 - but I've also read that it doesn't support GAL22V10's very well either, when it seems people have been using it to program those OK)

But using the GAL18V10 should allow the MGH8060(R) to do about the same as the MGH8060GAL's GAL22V10 (as don't need the GAL to do the serial inversion on this MGH8060(R) one that has an extra Inverter IC). And by not connecting D4 / D5 (unused on MGH8060GAL's GAL22V10 at present?) then can have A10 connection on a spare input, as well.
So I think I'll order some to have a try with, as my old Dataman 48XP does seem to support the GAL18V10/B at least / in the meantime try re-configuring the GAL16V8 and slightly re-jigged pin connections.
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Old 8th Apr 2024, 3:14 am   #28
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Default Re: MGH8060 full-house SC/MP - support thread

Quote:
Originally Posted by ortek_service View Post
>>
>>
Well after investigating this further, I found only small track-cuts were required on U4 (74LS573 now a GAL16V8's) grounded unused inputs (luckily just on the easily-accessible underside), to free these for use.
So I did that and wire-linked the following (which routed quite well, without any wires crossing over each other)
U4 Pin 9 ('D7' on original schematic) to INS8060 D7 (Pin 9)
U4 Pin 8 ('D6' on original schematic) to INS8060 D7 (Pin 10)
U4 Pin 7 ('D5' on original schematic) to INS8060 A11
(Moving A11 from previous pin 12 on GAL, to free-up this I/O pin)
U4 Pin 6 ('D4' on original schematic) to INS8060 A10
(To allow finer 1kB segment granularity in Memory-map - as on MGH8060GAL)

However, with the GAL16V8 only having 8 output-capable pins, and 3 chip select outputs plus 4 upper address-line outputs (A12 to A15) then there's only a single free output to use for either D-Flag or H-Flag etc.
>>
So now just need to hack the equations and try re-compiling these (with WinCUPL / PALASM?).
>>
>>

Well I managed to hack / combine Realltime's MGH8060R.EQN + Kris's MGH8060GAL equations files to do this, and re-compile / assemble a few days ago (using National Semiconductor's OPALjr suite EQN2JED.EXE)
Plus add onto the board a DLY-Flag Yellow LED, along with 1k series resistor - using some holes now empty on (the no-longer fitted) U7 & U8.

And this all seems to work OK (surprisingly first-time!) with Yellow 'DLY-Flag' LED flashing when running certain points of the system..
This new version also includes A10 (as well as D7) connected to spare inputs, in order to allow future amended GAL versions to be done, if finer granularity of Memory Blocks mapping is required / Halt-Flag is preferred over DLY-Flag.


So I've re-generated the document Ian (Realtime) had attached, updating it (keeping as close as possible to original, but highlighting changes in bold) with all the details (Plus new labelled photos of the links I did - Hopefully visible through the original 'RTV' PCB-safe silicone sealant I'd initially put on these after doing the MGH8060R versions, so had to peel some back a bit).

And I've attached it here, along with my new 'MGH8060o' version of the GAL16V8 (or Atmel ATF16V8) version Source + JEDEC-Programming files (+ also EQN2JED & DEVICE.LIB for ease of finding these, although may also need DOSBOX these days on 64bit Windows)
- In case anyone else wants to do this on Kris's initial MGH8060 (rather than re-build onto latest MGH8060GAL version PCB with larger DIL24 GAL22V10 IC).


Note: I'm still planning to try and update this even-further, using a (Lattice Only) GAL18V10 DIL20 IC, that I've now got some of. In order to give an extra (Halt-Flag etc) Output, as well as the DLY-Flag. But it looks like I need to try using WinCUPL etc, as NS OPALjr EQN2JED.EXE doesn't support the Lattice-Only GAL18V10, without adding this to the DEVICE.LIB file that looks quite difficult to work-out all the bit mappings.
Attached Thumbnails
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Attached Files
File Type: pdf Modifying the MGH8060 PCB for GAL address decoding_(Plus_DLY-Flag_Output).pdf (540.8 KB, 14 views)
File Type: zip MGH8060o.zip (73.7 KB, 8 views)

Last edited by ortek_service; 8th Apr 2024 at 3:27 am.
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