Hi,
This should help:
http://www.technogoths.demon.co.uk/405/RGB-conv-II.png
I've also noticed noisy,stretched sync pulses; I've yet to investigate (too many things to do, on top of which I've caught 'flu or something.)
The capacitors to which Jim refers are C1 and C2 - which are both part of RC filters with ridiculously long time-constant (compared to the pulses being fed in), which essentially remove all traces of sync pulse from one input of the XOR gate. So, one input of the gate is held steady (steady in logic terms), the other is pulsed. The result is that whatever polarity pulse you feed in, you get positive-going pulses coming out.
As far as I remember from 'scoping that part of the circuit while I was building it; the sync pulses emerging from IC1 pins 3 and 6 weren't stretched - if they were I'd have dropped automatic sync polarity detection.
When I was working on it leading up to NVCF, I remember everything being fine coming out of the last XOR gate, but it all went wrong in the subsequent transistor stages; that's where the pulse stretching occurred. I didn't look into it as I was running out of time and I've not had chance since to investigate either (mostly as I regard this sync combiner as a filthy hack and want to design something with a PLL run at twice line rate which regenerates proper syncs). I suspect lousy design on my part; I should stick to digital stuff and microprocessors
Regards, Kat