I hope this is the right section.
I have a fault with an old signal generator, which is in the CPU part of the instrument.
The instrument boots up erratically (more often not than does!). When it does boot up, it runs for 10 to 30 seconds before sending out a Hardware RESET instruction.
I am sure the problem is hardware related due to the erratic nature.
The boot sequence, looking at the I/O on the 6802 is different for a good boot as opposed to a bad boot! (I am using a 500MHz 40 channel logic analyser to read the chip).
Sometimes the boot sequence last a long time, and fails, sometimes it fails very quickly.
It usually fails with the 6802 sending out a hardware re-set instruction which latches the re-set pin low. Only way to reset is to power cycle the board.
All the basics are in place, E output, IRQ stays high etc I have re-seated all the socket mounted chips (and cleaned their pins).
So my questions:-
How does a 6802 boot up?
It must read the program from the ROM and/or EPROMS, but how does it address these to start loading a program? Is there a default start up sequence?
When I have a bad start up the 6802 is addressing the RAM and a GPIA before it looks at the ROM or EPROM. This does not sound right. (I have yet to capture a good startup as they are very rare!)
Can anyone suggest some kind of strategy for faultfinding on such a CPU board? I have just hooked up the logic analyser to read the Data ports, as can only think I need to see what the 6802 is doing on good startups and bad ones.
One other odd thing!
After powering up the CPU board before the RESET goes HIGH, all the address bits are low, except for A0, which is high! When the RESET is HIGH then A0 operates as expected. Replaced the output buffers, but just the same!
I enclose the schematic. If anyone wants a better copy please send me a PM.
Thanks in anticipation
